Re: [PATCH v3 1/3] clk: Add safe switch hook

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On 09/10/2015 01:52 AM, Stephen Boyd wrote:
> On 08/12, Georgi Djakov wrote:
>> From: Stephen Boyd <sboyd@xxxxxxxxxxxxxx>
>>
>> Sometimes clocks can't accept their parent source turning off
>> while the source is reprogrammed to a different rate. Most
>> notably CPU clocks require a way to switch away from the current
>> PLL they're running on, reprogram that PLL to a new rate, and
>> then switch back to the PLL with the new rate once they're done.
>> Add a hook that drivers can implement allowing them to return a
>> 'safe parent' and 'safe frequency' that they can switch their
>> parent to while the upstream source is reprogrammed to support
>> this.
>>
>> Signed-off-by: Stephen Boyd <sboyd@xxxxxxxxxxxxxx>
>> Signed-off-by: Georgi Djakov <georgi.djakov@xxxxxxxxxx>
> 
> Weird to be reviewing my own patch...
> 
> Anyway, Mike tells me that coordinated clock rates are going to
> be on the list this month. We should use those patches instead of
> this safe parent/rate stuff. If the patches don't appear soon, we
> can look into having the clock provider handle the parent/rate
> switch itself. That isn't any worse that what we've been doing in
> other providers.
> 

Ok, thanks for the information! I will start moving this into the
clock provider and when the coordinated clock rates are posted
will try using them.

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