Re: [PATCH v3 01/18] dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml

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On Sun, Aug 20, 2023 at 9:20 AM Dmitry Baryshkov
<dmitry.baryshkov@xxxxxxxxxx> wrote:
>
> Migrate legacy bindings (described in qcom,ipq8074-qmp-pcie-phy.yaml)
> to qcom,sc8280xp-qmp-pcie-phy.yaml. This removes a need to declare
> the child PHY node or split resource regions.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> ---
>  .../phy/qcom,ipq8074-qmp-pcie-phy.yaml        | 278 +++---------------
>  .../phy/qcom,msm8998-qmp-pcie-phy.yaml        |  97 ++++++
>  .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml       |  32 +-
>  3 files changed, 161 insertions(+), 246 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-pcie-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
> index 3d42ee3901a1..5073007267ad 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
> @@ -13,287 +13,79 @@ description:
>    QMP PHY controller supports physical layer functionality for a number of
>    controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
>
> -  Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
> -  qcom,sc8280xp-qmp-pcie-phy.yaml.
> -
>  properties:
>    compatible:
>      enum:
>        - qcom,ipq6018-qmp-pcie-phy
>        - qcom,ipq8074-qmp-gen3-pcie-phy
>        - qcom,ipq8074-qmp-pcie-phy
> -      - qcom,msm8998-qmp-pcie-phy
> -      - qcom,sc8180x-qmp-pcie-phy
> -      - qcom,sdm845-qhp-pcie-phy
> -      - qcom,sdm845-qmp-pcie-phy
> -      - qcom,sdx55-qmp-pcie-phy
> -      - qcom,sm8250-qmp-gen3x1-pcie-phy
> -      - qcom,sm8250-qmp-gen3x2-pcie-phy
> -      - qcom,sm8250-qmp-modem-pcie-phy
> -      - qcom,sm8450-qmp-gen3x1-pcie-phy
> -      - qcom,sm8450-qmp-gen4x2-pcie-phy
>
>    reg:
>      items:
>        - description: serdes
>
> -  "#address-cells":
> -    enum: [ 1, 2 ]
> -
> -  "#size-cells":
> -    enum: [ 1, 2 ]
> -
> -  ranges: true
> -
>    clocks:
> -    minItems: 2
> -    maxItems: 4
> +    maxItems: 3
>
>    clock-names:
> -    minItems: 2
> -    maxItems: 4
> +    items:
> +      - const: aux
> +      - const: cfg_ahb
> +      - const: pipe
>
>    resets:
> -    minItems: 1
>      maxItems: 2
>
>    reset-names:
> -    minItems: 1
> -    maxItems: 2
> -
> -  vdda-phy-supply: true
> -
> -  vdda-pll-supply: true
> -
> -  vddp-ref-clk-supply: true
> -
> -patternProperties:
> -  "^phy@[0-9a-f]+$":
> -    type: object
> -    description: single PHY-provider child node
> -    properties:
> -      reg:
> -        minItems: 3
> -        maxItems: 6
> -
> -      clocks:
> -        items:
> -          - description: PIPE clock
> -
> -      clock-names:
> -        deprecated: true
> -        items:
> -          - const: pipe0
> -
> -      "#clock-cells":
> -        const: 0
> -
> -      clock-output-names:
> -        maxItems: 1
> +    items:
> +      - const: phy
> +      - const: common
>
> -      "#phy-cells":
> -        const: 0
> +  "#clock-cells":
> +    const: 0
>
> -    required:
> -      - reg
> -      - clocks
> -      - "#clock-cells"
> -      - clock-output-names
> -      - "#phy-cells"
> +  clock-output-names:
> +    maxItems: 1
>
> -    additionalProperties: false
> +  "#phy-cells":
> +    const: 0
>
>  required:
>    - compatible
>    - reg
> -  - "#address-cells"
> -  - "#size-cells"
> -  - ranges
>    - clocks
>    - clock-names
>    - resets
>    - reset-names
> +  - "#clock-cells"
> +  - clock-output-names
> +  - "#phy-cells"
>
>  additionalProperties: false
>
> -allOf:
> -  - if:
> -      properties:
> -        compatible:
> -          contains:
> -            enum:
> -              - qcom,msm8998-qmp-pcie-phy
> -    then:
> -      properties:
> -        clocks:
> -          maxItems: 3
> -        clock-names:
> -          items:
> -            - const: aux
> -            - const: cfg_ahb
> -            - const: ref
> -        resets:
> -          maxItems: 2
> -        reset-names:
> -          items:
> -            - const: phy
> -            - const: common
> -      required:
> -        - vdda-phy-supply
> -        - vdda-pll-supply
> -
> -  - if:
> -      properties:
> -        compatible:
> -          contains:
> -            enum:
> -              - qcom,ipq6018-qmp-pcie-phy
> -              - qcom,ipq8074-qmp-gen3-pcie-phy
> -              - qcom,ipq8074-qmp-pcie-phy
> -    then:
> -      properties:
> -        clocks:
> -          maxItems: 2
> -        clock-names:
> -          items:
> -            - const: aux
> -            - const: cfg_ahb
> -        resets:
> -          maxItems: 2
> -        reset-names:
> -          items:
> -            - const: phy
> -            - const: common
> -
> -  - if:
> -      properties:
> -        compatible:
> -          contains:
> -            enum:
> -              - qcom,sc8180x-qmp-pcie-phy
> -              - qcom,sdm845-qhp-pcie-phy
> -              - qcom,sdm845-qmp-pcie-phy
> -              - qcom,sdx55-qmp-pcie-phy
> -              - qcom,sm8250-qmp-gen3x1-pcie-phy
> -              - qcom,sm8250-qmp-gen3x2-pcie-phy
> -              - qcom,sm8250-qmp-modem-pcie-phy
> -              - qcom,sm8450-qmp-gen3x1-pcie-phy
> -              - qcom,sm8450-qmp-gen4x2-pcie-phy
> -    then:
> -      properties:
> -        clocks:
> -          maxItems: 4
> -        clock-names:
> -          items:
> -            - const: aux
> -            - const: cfg_ahb
> -            - const: ref
> -            - const: refgen
> -        resets:
> -          maxItems: 1
> -        reset-names:
> -          items:
> -            - const: phy
> -      required:
> -        - vdda-phy-supply
> -        - vdda-pll-supply
> -
> -  - if:
> -      properties:
> -        compatible:
> -          contains:
> -            enum:
> -              - qcom,sc8180x-qmp-pcie-phy
> -              - qcom,sm8250-qmp-gen3x2-pcie-phy
> -              - qcom,sm8250-qmp-modem-pcie-phy
> -              - qcom,sm8450-qmp-gen4x2-pcie-phy
> -    then:
> -      patternProperties:
> -        "^phy@[0-9a-f]+$":
> -          properties:
> -            reg:
> -              items:
> -                - description: TX lane 1
> -                - description: RX lane 1
> -                - description: PCS
> -                - description: TX lane 2
> -                - description: RX lane 2
> -                - description: PCS_MISC
> -
> -  - if:
> -      properties:
> -        compatible:
> -          contains:
> -            enum:
> -              - qcom,sdm845-qmp-pcie-phy
> -              - qcom,sdx55-qmp-pcie-phy
> -              - qcom,sm8250-qmp-gen3x1-pcie-phy
> -              - qcom,sm8450-qmp-gen3x1-pcie-phy
> -    then:
> -      patternProperties:
> -        "^phy@[0-9a-f]+$":
> -          properties:
> -            reg:
> -              items:
> -                - description: TX
> -                - description: RX
> -                - description: PCS
> -                - description: PCS_MISC
> -
> -  - if:
> -      properties:
> -        compatible:
> -          contains:
> -            enum:
> -              - qcom,ipq6018-qmp-pcie-phy
> -              - qcom,ipq8074-qmp-pcie-phy
> -              - qcom,msm8998-qmp-pcie-phy
> -              - qcom,sdm845-qhp-pcie-phy
> -    then:
> -      patternProperties:
> -        "^phy@[0-9a-f]+$":
> -          properties:
> -            reg:
> -              items:
> -                - description: TX
> -                - description: RX
> -                - description: PCS
> -
>  examples:
>    - |
> -    #include <dt-bindings/clock/qcom,gcc-sm8250.h>
> -    phy-wrapper@1c0e000 {
> -        compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy";
> -        reg = <0x01c0e000 0x1c0>;
> -        #address-cells = <1>;
> -        #size-cells = <1>;
> -        ranges = <0x0 0x01c0e000 0x1000>;
> -
> -        clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
> -                 <&gcc GCC_PCIE_1_CFG_AHB_CLK>,
> -                 <&gcc GCC_PCIE_WIGIG_CLKREF_EN>,
> -                 <&gcc GCC_PCIE1_PHY_REFGEN_CLK>;
> -        clock-names = "aux", "cfg_ahb", "ref", "refgen";
> -
> -        resets = <&gcc GCC_PCIE_1_PHY_BCR>;
> -        reset-names = "phy";
> +    #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
> +    #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
>
> -        vdda-phy-supply = <&vreg_l10c_0p88>;
> -        vdda-pll-supply = <&vreg_l6b_1p2>;
> +    phy@84000 {
> +        compatible = "qcom,ipq6018-qmp-pcie-phy";
> +        reg = <0x0 0x00084000 0x0 0x1000>;

Now a warning in linux-next:

/builds/robherring/linux-dt/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.example.dtb:
phy@84000: reg: [[0, 540672], [0, 4096]] is too long
        from schema $id:
http://devicetree.org/schemas/phy/qcom,ipq8074-qmp-pcie-phy.yaml#

The default cell sizes are 1.

Rob




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