On 16.08.2023 16:57, Abel Vesa wrote:
> From: Jagadeesh Kona <quic_jkona@xxxxxxxxxxx>
>
> This change demonstrates the use of dev_pm_genpd_set_hwmode API from
> video driver to switch the video mvs0 gdsc to SW/HW modes at runtime
> based on requirement.
>
> This change adds a new boolean array member vcodec_pmdomains_hwctrl in
> venus_resources structure to indicate if GDSC's have HW control support
> or not. This data is used in vcodec_control_v4() to check if GDSC has
> support to switch to HW control mode and then call dev_pm_genpd_set_hwmode
> to switch the GDSC mode.
>
> Signed-off-by: Jagadeesh Kona <quic_jkona@xxxxxxxxxxx>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> ---
[...]
> static int vcodec_control_v4(struct venus_core *core, u32 coreid, bool enable)
> {
> - void __iomem *ctrl, *stat;
> - u32 val;
> - int ret;
> -
> - if (IS_V6(core)) {
> - ctrl = core->wrapper_base + WRAPPER_CORE_POWER_CONTROL_V6;
> - stat = core->wrapper_base + WRAPPER_CORE_POWER_STATUS_V6;
> - } else if (coreid == VIDC_CORE_ID_1) {
> - ctrl = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL;
> - stat = core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_STATUS;
> - } else {
> - ctrl = core->wrapper_base + WRAPPER_VCODEC1_MMCC_POWER_CONTROL;
> - stat = core->wrapper_base + WRAPPER_VCODEC1_MMCC_POWER_STATUS;
> - }
> -
> - if (enable) {
> - writel(0, ctrl);
> -
> - ret = readl_poll_timeout(stat, val, val & BIT(1), 1, 100);
> - if (ret)
> - return ret;
> - } else {
> - writel(1, ctrl);
This removal cries for better explanation.
Has the venus hw been setting some registers that alter the GDSC's state?
Or the hardware's expectations of the GDSC state?
Konrad
