Some TLMM pins are wakeup-capable. Describe the relationship between
these two peripherals to enable this functionality.
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 8f66306d1de3..8fd6f4d03490 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2261,6 +2261,7 @@ tlmm: pinctrl@f100000 {
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 157>;
+ wakeup-parent = <&pdc>;
cci0_default: cci0-default-state {
pins = "gpio39", "gpio40";
--
2.41.0
