v2 -> v3: - Fix the example - Pick up tags - remove the outdated example from the cover letter, check bindings should you want to see one The bindings for the wrapper node used in the yaml example are merged in qcom/for-next Link to v2: https://lore.kernel.org/r/20230328-topic-msgram_mpm-v2-0-e24a48e57f0d@xxxxxxxxxx v1 -> v2: - deprecate 'reg', make qcom,rpm-msg-ram required [1/2] - Use devm_ioremap() [2/2] Link to v1: https://lore.kernel.org/r/20230328-topic-msgram_mpm-v1-0-1b788a5f5a33@xxxxxxxxxx Depends on resolution of https://github.com/devicetree-org/dt-schema/issues/104 The MPM (and some other things, irrelevant to this patchset) resides (as far as the ARM cores are concerned, anyway) in a MMIO-mapped region that's a portion of the RPM (low-power management core)'s RAM, known as the RPM Message RAM. Representing this relation in the Device Tree creates some challenges, as one would either have to treat a memory region as a bus, map nodes in a way such that their reg-s would be overlapping, or supply the nodes with a slice of that region. This series implements the third option, by adding a qcom,rpm-msg-ram property, which has been used for some drivers poking into this region before. Bindings ABI compatibility is preserved through keeping the "normal" (a.k.a read the reg property and map that region) way of passing the register space. Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> --- Konrad Dybcio (2): dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space .../bindings/interrupt-controller/qcom,mpm.yaml | 44 +++++++++++++--------- drivers/irqchip/irq-qcom-mpm.c | 21 +++++++++-- 2 files changed, 45 insertions(+), 20 deletions(-) --- base-commit: 7c2878be573282a9961c359b806ccf70afe1a6b6 change-id: 20230328-topic-msgram_mpm-c688be3bc294 Best regards, -- Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
