On Wed, Jul 12, 2023 at 04:01:59PM +0530, Manivannan Sadhasivam wrote: > Minimum frequency of the "ice_core_clk" should be 75MHz as specified in the > downstream vendor devicetree. So fix it! > > https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.7.3.r1-09300-sdm845.0/arch/arm64/boot/dts/qcom/sdm845.dtsi > > Fixes: cc16687fbd74 ("arm64: dts: qcom: sdm845: add UFS controller") > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 9ed74bf72d05..89520a9fe1e3 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -2614,7 +2614,7 @@ ufs_mem_hc: ufshc@1d84000 { > <0 0>, > <0 0>, > <0 0>, > - <0 300000000>; > + <75000000 300000000>; Thanks for fixing this! What was the visible effect of this bug, if any? Do you know why the minimum has that particular value? The Fixes tag is wrong; it should be: Fixes: 433f9a57298f ("arm64: dts: sdm845: add Inline Crypto Engine registers and clock") - Eric
