SoCs without RPM have to enable sensors and calibrate from the kernel.
Though TSENS IP supports 16 sensors, not all are used. So used hw_id
to enable the relevant sensors.
Added new calibration function for V2 as the tsens.c calib function
only supports V1.
Signed-off-by: Praveenkumar I <quic_ipkumar@xxxxxxxxxxx>
---
[v2]:
Added separate init function for tsens v2 which calls init_common
and initialize the remaining fields. Reformatted calibrate function
and used hw_ids for sensors to enable.
drivers/thermal/qcom/tsens-v2.c | 144 ++++++++++++++++++++++++++++++++
drivers/thermal/qcom/tsens.c | 2 +-
drivers/thermal/qcom/tsens.h | 3 +
3 files changed, 148 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/qcom/tsens-v2.c
b/drivers/thermal/qcom/tsens-v2.c
index 29a61d2d6ca3..ba74d971fe95 100644
--- a/drivers/thermal/qcom/tsens-v2.c
+++ b/drivers/thermal/qcom/tsens-v2.c
@@ -6,11 +6,23 @@
#include <linux/bitops.h>
#include <linux/regmap.h>
+#include <linux/nvmem-consumer.h>
#include "tsens.h"
/* ----- SROT ------ */
#define SROT_HW_VER_OFF 0x0000
#define SROT_CTRL_OFF 0x0004
+#define SROT_MEASURE_PERIOD 0x0008
+#define SROT_Sn_CONVERSION 0x0060
+#define V2_SHIFT_DEFAULT 0x0003
+#define V2_SLOPE_DEFAULT 0x0cd0
+#define V2_CZERO_DEFAULT 0x016a
+#define ONE_PT_SLOPE 0x0cd0
+#define TWO_PT_SHIFTED_GAIN 921600
+#define ONE_PT_CZERO_CONST 94
+#define SENSOR_CONVERSION(n) (((n) * 4) + SROT_Sn_CONVERSION)
+#define CONVERSION_SLOPE_SHIFT 10
+#define CONVERSION_SHIFT_SHIFT 23
/* ----- TM ------ */
#define TM_INT_EN_OFF 0x0004
@@ -59,6 +71,11 @@ static const struct reg_field
tsens_v2_regfields[MAX_REGFIELDS] = {
/* CTRL_OFF */
[TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
+ [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 18),
+ [CODE_OR_TEMP] = REG_FIELD(SROT_CTRL_OFF, 21, 21),
+
+ /* MAIN_MEASURE_PERIOD */
+ [MAIN_MEASURE_PERIOD] = REG_FIELD(SROT_MEASURE_PERIOD, 0, 7),
/* ----- TM ------ */
/* INTERRUPT ENABLE */
@@ -104,6 +121,133 @@ static const struct reg_field
tsens_v2_regfields[MAX_REGFIELDS] = {
[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
};
+static int tsens_v2_calibrate_sensor(struct device *dev, struct
tsens_sensor *sensor,
+ struct regmap *map, u32 mode, u32 base0, u32
base1)
+{
+ u32 slope, czero, val;
+ char name[15];
+ int ret;
+
+ /* Read offset value */
+ ret = snprintf(name, sizeof(name), "s%d", sensor->hw_id);
+ if (ret < 0)
+ return ret;
+
+ ret = nvmem_cell_read_variable_le_u32(dev, name, &sensor->offset);
+ if (ret)
+ return ret;
+
+ /* Based on calib mode, program SHIFT, SLOPE and CZERO */
+ switch (mode) {
+ case TWO_PT_CALIB:
+ slope = (TWO_PT_SHIFTED_GAIN / (base1 - base0));
+
+ czero = (base0 + sensor->offset - ((base1 - base0) / 3));
+
+ val = (V2_SHIFT_DEFAULT << CONVERSION_SHIFT_SHIFT) |
+ (slope << CONVERSION_SLOPE_SHIFT) | czero;
+
+ fallthrough;
+ case ONE_PT_CALIB2:
+ czero = base0 + sensor->offset - ONE_PT_CZERO_CONST;
+
+ val = (V2_SHIFT_DEFAULT << CONVERSION_SHIFT_SHIFT) |
+ (ONE_PT_SLOPE << CONVERSION_SLOPE_SHIFT) | czero;
+
+ break;
+ default:
+ dev_dbg(dev, "calibrationless mode\n");
+
+ val = (V2_SHIFT_DEFAULT << CONVERSION_SHIFT_SHIFT) |
+ (V2_SLOPE_DEFAULT << CONVERSION_SLOPE_SHIFT) |
V2_CZERO_DEFAULT;
+ }
+
+ regmap_write(map, SENSOR_CONVERSION(sensor->hw_id), val);
+
+ return 0;
+}
+
+static int tsens_v2_calibration(struct tsens_priv *priv)
+{
+ struct device *dev = priv->dev;
+ u32 mode, base0, base1;
+ int i, ret;
+
+ if (priv->num_sensors > MAX_SENSORS)
+ return -EINVAL;
+
+ ret = nvmem_cell_read_variable_le_u32(priv->dev, "mode", &mode);
+ if (ret == -ENOENT)
+ dev_warn(priv->dev, "Calibration data not present in DT\n");
+ if (ret < 0)
+ return ret;
+
+ dev_dbg(priv->dev, "calibration mode is %d\n", mode);
+
+ ret = nvmem_cell_read_variable_le_u32(priv->dev, "base0", &base0);
+ if (ret < 0)
+ return ret;
+
+ ret = nvmem_cell_read_variable_le_u32(priv->dev, "base1", &base1);
+ if (ret < 0)
+ return ret;
+
+ /* Calibrate each sensor */
+ for (i = 0; i < priv->num_sensors; i++) {
+ ret = tsens_v2_calibrate_sensor(dev, &priv->sensor[i],
priv->srot_map,
+ mode, base0, base1);
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int __init init_tsens_v2(struct tsens_priv *priv)
+{
+ int i, ret;
+ u32 val = 0;
+ struct device *dev = priv->dev;
+
+ ret = init_common(priv);
+ if (ret < 0)
+ return ret;
+
+ if (priv->feat->ver_major != VER_2_X_NO_RPM)
+ return 0;
