+ cat->dspp[i].name,
+ cat->dspp[i].sblk->pcc.name);
+ }
+
/* dump INTF sub-blocks HW regs info */
for (i = 0; i < cat->intf_count; i++)
msm_disp_snapshot_add_block(disp_state, cat->intf[i].len,
dpu_kms->mmio +
cat->intf[i].base, cat->intf[i].name);
/* dump PP sub-blocks HW regs info */
- for (i = 0; i < cat->pingpong_count; i++)
+ for (i = 0; i < cat->pingpong_count; i++) {
msm_disp_snapshot_add_block(disp_state,
cat->pingpong[i].len, dpu_kms->mmio +
cat->pingpong[i].base, cat->pingpong[i].name);
+ /* TE2 block has length of 0, so will not print it */
+
+ if (cat->pingpong[i].sblk &&
cat->pingpong[i].sblk->dither.len > 0)
+ msm_disp_snapshot_add_block(disp_state,
cat->pingpong[i].sblk->dither.len,
+ dpu_kms->mmio + cat->pingpong[i].base +
+ cat->pingpong[i].sblk->dither.base, "%s_%s",
+ cat->pingpong[i].name,
+ cat->pingpong[i].sblk->dither.name);
+ }
+
/* dump SSPP sub-blocks HW regs info */
- for (i = 0; i < cat->sspp_count; i++)
+ for (i = 0; i < cat->sspp_count; i++) {
msm_disp_snapshot_add_block(disp_state, cat->sspp[i].len,
dpu_kms->mmio +
cat->sspp[i].base, cat->sspp[i].name);
+ if (cat->sspp[i].sblk && cat->sspp[i].sblk->scaler_blk.len > 0)
+ msm_disp_snapshot_add_block(disp_state,
cat->sspp[i].sblk->scaler_blk.len,
+ dpu_kms->mmio + cat->sspp[i].base +
+ cat->sspp[i].sblk->scaler_blk.base, "%s_%s",
+ cat->sspp[i].name,
+ cat->sspp[i].sblk->scaler_blk.name);
+
+ if (cat->sspp[i].sblk && cat->sspp[i].sblk->csc_blk.len > 0)
+ msm_disp_snapshot_add_block(disp_state,
cat->sspp[i].sblk->csc_blk.len,
+ dpu_kms->mmio + cat->sspp[i].base +
+ cat->sspp[i].sblk->csc_blk.base, "%s_%s",
+ cat->sspp[i].name,
+ cat->sspp[i].sblk->csc_blk.name);
+ }
+
/* dump LM sub-blocks HW regs info */
for (i = 0; i < cat->mixer_count; i++)
msm_disp_snapshot_add_block(disp_state, cat->mixer[i].len,
dpu_kms->mmio +
@@ -943,9 +976,30 @@ static void dpu_kms_mdp_snapshot(struct
msm_disp_state *disp_state, struct msm_k
}
/* dump DSC sub-blocks HW regs info */
- for (i = 0; i < cat->dsc_count; i++)
- msm_disp_snapshot_add_block(disp_state, cat->dsc[i].len,
dpu_kms->mmio +
- cat->dsc[i].base, cat->dsc[i].name);
+ for (i = 0; i < cat->dsc_count; i++) {
+ if (cat->dsc[i].features & BIT(DPU_DSC_HW_REV_1_2)) {
+ struct dpu_dsc_blk enc = cat->dsc[i].sblk->enc;
+ struct dpu_dsc_blk ctl = cat->dsc[i].sblk->ctl;
+
+ /* For now, pass in a length of 0 because the DSC_BLK
register space
+ * overlaps with the sblks' register space.
+ *
+ * TODO: Pass in a length of 0 to DSC_BLK_1_2 in the HW
catalog where
+ * applicable.