On Fri, Jun 23, 2023 at 04:53:44PM +0200, Konrad Dybcio wrote:
> On 23.06.2023 16:18, Komal Bajaj wrote:
> > diff --git a/drivers/nvmem/sec-qfprom.c b/drivers/nvmem/sec-qfprom.c
[..]
> > +static int sec_qfprom_reg_read(void *context, unsigned int reg, void *_val, size_t bytes)
> > +{
> > + struct sec_qfprom_priv *priv = context;
> > + u8 *val = _val;
> > + u8 *tmp;
> > + u32 read_val;
> > + unsigned int i;
> Please sort this to look like a reverse-Christmas-tree
>
>
> > +
> > + for (i = 0; i < bytes; i++, reg++) {
> > + if (i == 0 || reg % 4 == 0) {
> > + if (qcom_scm_io_readl(priv->qfpseccorrected + (reg & ~3), &read_val)) {
> > + dev_err(priv->dev, "Couldn't access fuse register\n");
> > + return -EINVAL;
> > + }
> > + tmp = (u8 *)&read_val;
> > + }
> I don't understand this read-4-times dance.. qcom_scm_io_readl() reads
> u32, so this should be as simple as:
>
> val[i + 0] = FIELD_GET(GENMASK(7, 0), reg);
> val[i + 1] = ..
> val[i + 2] = ..
> val[i + 3] = ..
>
No need for FIELD_GET() to do that, you can just do *(u32*)val =
read_val; although this comes with alignment issues.
But, that this the length of val is always divisible by 4, and I
wasn't able to convince myself that it was the case...
So this is, pretty much, what I proposed in v3:
https://lore.kernel.org/linux-arm-msm/20230527205031.iwsujvlbxazukwfy@ripper/
Regards,
Bjorn
>
> > +
> > + val[i] = tmp[reg & 3];
> > + }
> > +
> > + return 0;
