Re: [PATCH v2 17/26] ARM: dts: qcom: apq8064: add simple CPUFreq support

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On 27.06.2023 16:11, Dmitry Baryshkov wrote:
> On Tue, 27 Jun 2023 at 15:13, Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> wrote:
>>
>> On 26.06.2023 21:49, Dmitry Baryshkov wrote:
>>> On 26/06/2023 19:40, Konrad Dybcio wrote:
>>>> On 25.06.2023 22:25, Dmitry Baryshkov wrote:
>>>>> Declare CPU frequency-scaling properties. Each CPU has its own clock,
>>>>> how
>>>> however?
>>>
>>> yes
>>>
>>>>
>>>>> all CPUs have the same OPP table. Voltage scaling is not (yet)
>>>>> enabled with this patch. It will be enabled later.
>>>> Risky business.
>>>
>>> But it works :D
>> On your machine ;)
> 
> On two nexus-7 and one ifc6410.
> 
>>
>> [...]
>>
>>>>>   +    kraitcc: clock-controller {
>>>>> +        compatible = "qcom,krait-cc-v1";
>>>> Are we sure we don't wanna rework this compatible? Check the comment in
>>>> drivers/clk/qcom/krait-cc.c : krait_add_sec_mux()
>>>
>>> I remember that comment. I'd rather not introduce another compat string for such old hw. Would there be any direct benefits?
>>>
>> I'd say that the one we have here never made much sense.. Perhaps (since
>> nobody used it for 10 years) it would make sense to remodel it..
> 
> Well we have the bindings for this driver. And also it was used by the
> OpenWRT people, IIRC.
> Thus I don't feel comfortable with throwing out old compat strings.
Oh, OK

Konrad
> 
>>
>> Konrad
>>>>
>>>>
>>>>> +        clocks = <&gcc PLL9>, /* hfpll0 */
>>>>> +             <&gcc PLL10>, /* hfpll1 */
>>>>> +             <&gcc PLL16>, /* hfpll2 */
>>>>> +             <&gcc PLL17>, /* hfpll3 */
>>>>> +             <&gcc PLL12>, /* hfpll_l2 */
>>>>> +             <&acc0>,
>>>>> +             <&acc1>,
>>>>> +             <&acc2>,
>>>>> +             <&acc3>,
>>>>> +             <&l2cc>;
>>>>> +        clock-names = "hfpll0",
>>>>> +                  "hfpll1",
>>>>> +                  "hfpll2",
>>>>> +                  "hfpll3",
>>>>> +                  "hfpll_l2",
>>>>> +                  "acpu0_aux",
>>>>> +                  "acpu1_aux",
>>>>> +                  "acpu2_aux",
>>>>> +                  "acpu3_aux",
>>>>> +                  "acpu_l2_aux";
>>>>> +        #clock-cells = <1>;
>>>>> +        #interconnect-cells = <1>;
>>>>> +    };
>>>>> +
>>>>>       sfpb_mutex: hwmutex {
>>>>>           compatible = "qcom,sfpb-mutex";
>>>>>           syscon = <&sfpb_wrapper_mutex 0x604 0x4>;
>>>>> @@ -933,6 +1100,9 @@ qfprom: qfprom@700000 {
>>>>>               #address-cells = <1>;
>>>>>               #size-cells = <1>;
>>>>>               ranges;
>>>>> +            speedbin_efuse: speedbin@c0 {
>>>>> +                reg = <0x0c0 0x4>;
>>>>> +            };
>>>> Newline between properties and subnodes & between individual subnodes,
>>>> please
>>>
>>> ack.
>>>
>>>>
>>>> Konrad
>>>>>               tsens_calib: calib@404 {
>>>>>                   reg = <0x404 0x10>;
>>>>>               };
>>>
> 
> 
> 



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