On Mon, 19 Jun 2023 20:33:59 +0530, Manivannan Sadhasivam wrote:
> The SoCs making use of Qualcomm PCIe controllers do not support the PCIe hotplug
> functionality. But the hotplug capability bit is set by default in the hardware.
> This causes the kernel PCI core to register hotplug service for the controller
> and send hotplug commands to it. But those commands will timeout generating
> messages as below during boot and suspend/resume.
>
> [ 5.782159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2020 msec ago)
> [ 5.810161] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2048 msec ago)
> [ 7.838162] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x07c0 (issued 2020 msec ago)
> [ 7.870159] pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x07c0 (issued 2052 msec ago)
>
> [...]
Applied to controller/qcom, thanks!
[1/9] PCI: qcom: Disable write access to read only registers for IP v2.3.3
https://git.kernel.org/pci/pci/c/a33d700e8eea
[2/9] PCI: qcom: Use DWC helpers for modifying the read-only DBI registers
https://git.kernel.org/pci/pci/c/60f0072d7fb7
[3/9] PCI: qcom: Disable write access to read only registers for IP v2.9.0
https://git.kernel.org/pci/pci/c/200b8f85f202
[4/9] PCI: qcom: Do not advertise hotplug capability for IPs v2.7.0 and v1.9.0
https://git.kernel.org/pci/pci/c/a54db86ddc15
[5/9] PCI: qcom: Do not advertise hotplug capability for IPs v2.3.3 and v2.9.0
https://git.kernel.org/pci/pci/c/11bce06b21a0
[6/9] PCI: qcom: Do not advertise hotplug capability for IP v2.3.2
https://git.kernel.org/pci/pci/c/25966e78d303
[7/9] PCI: qcom: Use post init sequence of IP v2.3.2 for v2.4.0
https://git.kernel.org/pci/pci/c/e35d13a5ff37
[8/9] PCI: qcom: Do not advertise hotplug capability for IP v1.0.0
https://git.kernel.org/pci/pci/c/fa2dc2528684
[9/9] PCI: qcom: Do not advertise hotplug capability for IP v2.1.0
https://git.kernel.org/pci/pci/c/1fdecc5bc8e8
Thanks,
Lorenzo
