On Wed, 14 Jun 2023 19:54:23 +0530, Krishna chaitanya chundru wrote:
> Add basic support for managing "pcie-mem" interconnect path by setting
> a low constraint before enabling clocks and updating it after the link
> is up based on link speed and width the device got enumerated.
>
> changes from v3:
> - ran make DT_CHECKER_FLAGS=-m dt_binding_check and fixed
> errors.
> - Added macros in the qcom ep driver patch as suggested by Dmitry
> changes from v2:
> - changed the logic for getting speed and width as suggested
> by bjorn.
> - fixed compilation errors.
>
> [...]
Applied, thanks!
[2/3] arm: dts: qcom: sdx55: Add interconnect path
commit: 831b802a7727ba6e67c5ed585c54f610d9db1316
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
