From: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx> Describe the SGMII/SerDes PHY present on the sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx> --- .../phy/qcom,sa8775p-dwmac-sgmii-phy.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml new file mode 100644 index 000000000000..ba8d2bee1563 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SerDes/SGMII ethernet PHY controller + +maintainers: + - Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx> + +description: + The SerDes PHY sits between the MAC and the external PHY and provides + separate Rx Tx lines. + +properties: + compatible: + const: qcom,sa8775p-dwmac-sgmii-phy + + reg: + items: + - description: serdes + + clocks: + maxItems: 1 + + clock-names: + const: sgmi_ref + + "#phy-cells": + const: 0 + +additionalProperties: false + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + +examples: + - | + #include <dt-bindings/clock/qcom,sa8775p-gcc.h> + serdes_phy: phy@8901000 { + compatible = "qcom,sa8775p-dwmac-sgmii-phy"; + reg = <0x08901000 0xe10>; + clocks = <&gcc GCC_SGMI_CLKREF_EN>; + clock-names = "sgmi_ref"; + #phy-cells = <0>; + status = "disabled"; + }; -- 2.39.2
