On SC8280XP, LPASS IP is controlled by q6dsp, however the reset lines
required by some of the IPs like Soundwire still need to be programmed from
Apps processor. This patchset adds support to reset controller on LPASS
CC and LPASS AudioCC.
Tested on X13s.
Thanks,
Srini
Changes since v2:
- removed qcom,adsp-pil-mode bindings, can be added when
we have a variant of this SoC without dsp control
- added compile check in Kconfig
- fix variable naming to reflect correct cc.
- few minor style related changes
Srinivas Kandagatla (6):
dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP
dt-bindings: clock: Add LPASS AUDIOCC and reset controller for
SC8280XP
clk: qcom: Add lpass clock controller driver for SC8280XP
clk: qcom: Add lpass audio clock controller driver for SC8280XP
arm64: dts: qcom: sc8280xp: add resets for soundwire controllers
arm64: defconfig: Enable sc828x0xp lpasscc clock controller
.../bindings/clock/qcom,sc8280xp-lpasscc.yaml | 60 +++++++++++++
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 21 +++++
arch/arm64/configs/defconfig | 1 +
drivers/clk/qcom/Kconfig | 9 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/lpasscc-sc8280xp.c | 87 +++++++++++++++++++
.../dt-bindings/clock/qcom,sc8280xp-lpasscc.h | 17 ++++
7 files changed, 196 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml
create mode 100644 drivers/clk/qcom/lpasscc-sc8280xp.c
create mode 100644 include/dt-bindings/clock/qcom,sc8280xp-lpasscc.h
--
2.25.1
