On Thu, May 25, 2023 at 01:29:25PM +0100, Srinivas Kandagatla wrote: > The LPASS (Low Power Audio Subsystem) clock controller provides reset > support when it is under the control of Q6DSP. > > Add support for those resets and adds IDs for clients to request the reset. > > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx> > --- > .../bindings/clock/qcom,sc8280xp-lpasscc.yaml | 57 +++++++++++++++++++ > .../dt-bindings/clock/qcom,lpasscc-sc8280xp.h | 12 ++++ > 2 files changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > create mode 100644 include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > new file mode 100644 > index 000000000000..08a9ae60a365 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > @@ -0,0 +1,57 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sc8280xp-lpasscc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm LPASS Core & Audio Clock Controller on SC8280XP > + > +maintainers: > + - Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx> > + > +description: | > + Qualcomm LPASS core and audio clock control module provides the clocks, > + and reset on SC8280XP. > + > + See also:: > + include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > + > +properties: > + reg: true > + > + compatible: > + enum: > + - qcom,sc8280xp-lpasscc > + > + qcom,adsp-pil-mode: > + description: > + Indicates if the LPASS would be brought out of reset using > + peripheral loader. > + type: boolean > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > +required: > + - compatible > + - reg > + - qcom,adsp-pil-mode > + - '#reset-cells' > + - '#clock-cells' Nit: #clock before #reset > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,lpasscc-sc8280xp.h> > + lpasscc: clock-controller@33e0000 { > + compatible = "qcom,sc8280xp-lpasscc"; > + reg = <0x033e0000 0x12000>; > + qcom,adsp-pil-mode; > + #reset-cells = <1>; > + #clock-cells = <1>; Nit: #clock before #reset > + }; > +... > diff --git a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > new file mode 100644 > index 000000000000..df800ea2741c > --- /dev/null > +++ b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > @@ -0,0 +1,12 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (c) 2023, Linaro Ltd. > + */ > + > +#ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H > +#define _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H > + > +/* LPASS TCSR */ > +#define LPASS_AUDIO_SWR_TX_CGCR 0 > + > +#endif Reviewed-by: Johan Hovold <johan+linaro@xxxxxxxxxx> Johan
