On 21.05.2023 22:38, Dmitry Baryshkov wrote:
> Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
> resource region, no per-PHY subnodes).
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Konrad
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 17 +++++------------
> 1 file changed, 5 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index 631ca327e064..289b96d31414 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -784,7 +784,7 @@ ufs_mem_hc: ufs@4804000 {
> reg = <0x0 0x04804000 0x0 0x3000>, <0x0 0x04810000 0x0 0x8000>;
> reg-names = "std", "ice";
> interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> - phys = <&ufs_mem_phy_lanes>;
> + phys = <&ufs_mem_phy>;
> phy-names = "ufsphy";
> lanes-per-direction = <1>;
> #reset-cells = <1>;
> @@ -825,24 +825,17 @@ ufs_mem_hc: ufs@4804000 {
>
> ufs_mem_phy: phy@4807000 {
> compatible = "qcom,sm6115-qmp-ufs-phy";
> - reg = <0x0 0x04807000 0x0 0x1c4>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> + reg = <0x0 0x04807000 0x0 0x1000>;
>
> clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
> clock-names = "ref", "ref_aux";
>
> resets = <&ufs_mem_hc 0>;
> reset-names = "ufsphy";
> - status = "disabled";
>
> - ufs_mem_phy_lanes: phy@4807400 {
> - reg = <0x0 0x04807400 0x0 0x098>,
> - <0x0 0x04807600 0x0 0x130>,
> - <0x0 0x04807c00 0x0 0x16c>;
> - #phy-cells = <0>;
> - };
> + #phy-cells = <0>;
> +
> + status = "disabled";
> };
>
> gpi_dma0: dma-controller@4a00000 {
