On Thu, 18 May 2023 at 14:00, Kathiravan T <quic_kathirav@xxxxxxxxxxx> wrote:
>
> Add the definition for the UART1 found on IPQ5332 SoC.
>
> Signed-off-by: Kathiravan T <quic_kathirav@xxxxxxxxxxx>
> ---
> Changes in V2:
> - Added the dma and dma-names property
> - Didn't pick up the R-b tag due to above change
>
> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> index 12e0e179e139..753581e60604 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> @@ -218,6 +218,18 @@
> status = "disabled";
> };
>
> + blsp1_uart1: serial@78b0000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x078b0000 0x200>;
> + interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
> + <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> + dmas = <&blsp_dma 2>, <&blsp_dma 3>;
> + dma-names = "tx", "rx";
> + status = "disabled";
> + };
> +
> blsp1_spi0: spi@78b5000 {
> compatible = "qcom,spi-qup-v2.2.1";
> reg = <0x078b5000 0x600>;
> --
> 2.17.1
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx>
Thanks.
