On 17.05.2023 20:09, Jonathan Marek wrote: > AFAIK GMU_ALWAYS_ON_COUNTER does not have the same value as CP_ALWAYS_ON_COUNTER (only the same frequency), so changing this would break userspace expecting to be able to compare the value returned by MSM_PARAM_TIMESTAMP with CP timestamp values. FWIW A630 and A730 seem to work fine with this patch. Anything in particular I should look out for? Konrad > > On 5/17/23 12:50 PM, Konrad Dybcio wrote: >> Use the always-on counter provided by the GMU to skip having to >> keep the GPU online. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> >> --- >> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 9 +++------ >> 1 file changed, 3 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> index 8707e8b6ac7e..d2a999b90589 100644 >> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c >> @@ -1664,12 +1664,9 @@ static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) >> mutex_lock(&a6xx_gpu->gmu.lock); >> - /* Force the GPU power on so we can read this register */ >> - a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); >> - >> - *value = gpu_read64(gpu, REG_A6XX_CP_ALWAYS_ON_COUNTER); >> - >> - a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_PERFCOUNTER_SET); >> + *value = gmu_read64(&a6xx_gpu->gmu, >> + REG_A6XX_GMU_ALWAYS_ON_COUNTER_L, >> + REG_A6XX_GMU_ALWAYS_ON_COUNTER_H); >> mutex_unlock(&a6xx_gpu->gmu.lock); >>
