On 8.05.2023 18:31, Kathiravan T wrote:
> SDCC clocks must be rounded down to avoid overclocking the controller.
>
> Fixes: 3d89d52970fd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
> Signed-off-by: Kathiravan T <quic_kathirav@xxxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Konrad
> drivers/clk/qcom/gcc-ipq5332.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
> index bdb4a0a11d07..1ad23aa8aa5a 100644
> --- a/drivers/clk/qcom/gcc-ipq5332.c
> +++ b/drivers/clk/qcom/gcc-ipq5332.c
> @@ -963,7 +963,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
> .name = "gcc_sdcc1_apps_clk_src",
> .parent_data = gcc_parent_data_9,
> .num_parents = ARRAY_SIZE(gcc_parent_data_9),
> - .ops = &clk_rcg2_ops,
> + .ops = &clk_rcg2_floor_ops,
> },
> };
>
