On 2023-04-27 13:20:28, Abhinav Kumar wrote:
<snip>
> >> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> >> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> >> @@ -127,12 +127,10 @@ enum {
> >> /**
> >> * DSPP sub-blocks
> >> * @DPU_DSPP_PCC Panel color correction block
> >> - * @DPU_DSPP_GC Gamma correction block
> >> * @DPU_DSPP_IGC Inverse gamma correction block
> >> */
> >> enum {
> >> DPU_DSPP_PCC = 0x1,
> >> - DPU_DSPP_GC,
> >> DPU_DSPP_IGC,
> >
> > Don't we need to remove this one too (in the previous patch)?
>
> Yes, we should. I thought of it right after sending this. will push a v3
> which fixes it in the prev patch.
Yes please. Don't forget to mention that dpu_dspp_sub_blks didn't even
have an igc member describing the block.
- Marijn
> >> DPU_DSPP_MAX
> >> };
> >> @@ -433,22 +431,18 @@ struct dpu_sspp_sub_blks {
> >> * @maxwidth: Max pixel width supported by this mixer
> >> * @maxblendstages: Max number of blend-stages supported
> >> * @blendstage_base: Blend-stage register base offset
> >> - * @gc: gamma correction block
> >> */
> >> struct dpu_lm_sub_blks {
> >> u32 maxwidth;
> >> u32 maxblendstages;
> >> u32 blendstage_base[MAX_BLOCKS];
> >> - struct dpu_pp_blk gc;
> >> };
> >> /**
> >> * struct dpu_dspp_sub_blks: Information of DSPP block
> >> - * @gc : gamma correction block
> >> * @pcc: pixel color correction block
> >> */
> >> struct dpu_dspp_sub_blks {
> >> - struct dpu_pp_blk gc;
> >> struct dpu_pp_blk pcc;
> >> };
> >
