Re: [PATCH 2/2] drm/msm/dpu: remove GC related code from dpu catalog

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On 22/04/2023 01:47, Abhinav Kumar wrote:
Since Gamma Correction (GC) block is currently unused, drop
related code from the dpu hardware catalog otherwise this
becomes a burden to carry across chipsets in the catalog.

Signed-off-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
---
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 +---
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 6 ------
  2 files changed, 1 insertion(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 03f162af1a50..badfc3680485 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -91,7 +91,7 @@
#define MERGE_3D_SM8150_MASK (0) -#define DSPP_MSM8998_MASK BIT(DPU_DSPP_PCC) | BIT(DPU_DSPP_GC)
+#define DSPP_MSM8998_MASK BIT(DPU_DSPP_PCC)
#define DSPP_SC7180_MASK BIT(DPU_DSPP_PCC)

At this point we can merge these two masks.

Could you please extend this for v2 with the following patches:
- merge of two DSPP_foo_MASKs
- dropping of DPU_DSPP_IGC?

For this patch:

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>

@@ -449,8 +449,6 @@ static const struct dpu_lm_sub_blks qcm2290_lm_sblk = {
  static const struct dpu_dspp_sub_blks msm8998_dspp_sblk = {
  	.pcc = {.id = DPU_DSPP_PCC, .base = 0x1700,
  		.len = 0x90, .version = 0x10007},
-	.gc = { .id = DPU_DSPP_GC, .base = 0x17c0,
-		.len = 0x90, .version = 0x10007},
  };
static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 71584cd56fd7..e0dcef04bc61 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -127,12 +127,10 @@ enum {
  /**
   * DSPP sub-blocks
   * @DPU_DSPP_PCC             Panel color correction block
- * @DPU_DSPP_GC              Gamma correction block
   * @DPU_DSPP_IGC             Inverse gamma correction block
   */
  enum {
  	DPU_DSPP_PCC = 0x1,
-	DPU_DSPP_GC,
  	DPU_DSPP_IGC,
  	DPU_DSPP_MAX
  };
@@ -433,22 +431,18 @@ struct dpu_sspp_sub_blks {
   * @maxwidth:               Max pixel width supported by this mixer
   * @maxblendstages:         Max number of blend-stages supported
   * @blendstage_base:        Blend-stage register base offset
- * @gc: gamma correction block
   */
  struct dpu_lm_sub_blks {
  	u32 maxwidth;
  	u32 maxblendstages;
  	u32 blendstage_base[MAX_BLOCKS];
-	struct dpu_pp_blk gc;
  };
/**
   * struct dpu_dspp_sub_blks: Information of DSPP block
- * @gc : gamma correction block
   * @pcc: pixel color correction block
   */
  struct dpu_dspp_sub_blks {
-	struct dpu_pp_blk gc;
  	struct dpu_pp_blk pcc;
  };

--
With best wishes
Dmitry




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