On Wed, 12 Apr 2023 16:48:29 +0300, Dmitry Baryshkov wrote:
> On SM8350 platform the PCIe PIPE clocks require additional handling to
> function correclty. They are to be switched to the tcxo source before
> turning PCIe GDSCs off and should be switched to PHY PIPE source once
> they are working. Swithc PCIe PHY clocks to use clk_regmap_phy_mux_ops,
> which provide support for this dance.
>
>
> [...]
Applied, thanks!
[1/1] clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling
commit: 1a500e0bc97b6cb3c0d9859e81973b8dd07d1b7b
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
