This is a forward port / upstream refactor of code delivered
downstream by Qualcomm over at [0] to enable the DWMAC5 based
implementation called EMAC3 on the sa8540p-ride dev board.
>From what I can tell with the board schematic in hand,
as well as the code delivered, the main changes needed are:
1. A new address space layout for dwmac5/EMAC3 MTL/DMA regs
2. A new programming sequence required for the EMAC3 base platforms
This series addresses the devicetree and clock changes to support this
hardware bringup.
As requested[1], it has been split up by compile deps / maintainer tree.
The associated v4 of the netdev specific changes can be found at [2].
Together, they result in the ethernet controller working for
both controllers on this platform.
The netdev changes have been merged, so this series should be good to go
assuming it passes review (with patch 3 being the only unexplicitly
reviewed patch).
[0] https://git.codelinaro.org/clo/la/kernel/ark-5.14/-/commit/510235ad02d7f0df478146fb00d7a4ba74821b17
[1] https://lore.kernel.org/netdev/20230320202802.4e7dc54c@xxxxxxxxxx/
[2] https://lore.kernel.org/netdev/20230411200409.455355-1-ahalaney@xxxxxxxxxx/T/#t
v4: https://lore.kernel.org/netdev/20230411202009.460650-1-ahalaney@xxxxxxxxxx/
v3: https://lore.kernel.org/netdev/20230331215804.783439-1-ahalaney@xxxxxxxxxx/T/#m2f267485d215903494d9572507417793e600b2bf
v2: https://lore.kernel.org/netdev/20230320221617.236323-1-ahalaney@xxxxxxxxxx/
v1: https://lore.kernel.org/netdev/20230313165620.128463-1-ahalaney@xxxxxxxxxx/
Thanks,
Andrew
Andrew Halaney (3):
clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
arm64: dts: qcom: sc8280xp: Add ethernet nodes
arm64: dts: qcom: sa8540p-ride: Add ethernet nodes
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 179 ++++++++++++++++++
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 60 ++++++
drivers/clk/qcom/gcc-sc8280xp.c | 18 ++
include/dt-bindings/clock/qcom,gcc-sc8280xp.h | 2 +
4 files changed, 259 insertions(+)
--
2.39.2
