On Fri, Mar 31, 2023 at 12:19:10PM +0200, Johan Hovold wrote:
> On Fri, Mar 31, 2023 at 02:57:11PM +0530, Varadarajan Narayanan wrote:
> > On Thu, Mar 30, 2023 at 12:44:40PM +0300, Dmitry Baryshkov wrote:
> > > On Thu, 30 Mar 2023 at 11:42, Varadarajan Narayanan
> > > <quic_varada@xxxxxxxxxxx> wrote:
> > > >
> > > > Add USB phy and controller related nodes
> > > >
> > > > Signed-off-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx>
> > > > ---
> > > > Changes in v5:
> > > > - Fix additional comments
> > > > - Edit nodes to match with qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> > > > - 'make dtbs_check' giving the following messages since
> > > > ipq9574 doesn't have power domains. Hope this is ok
> > > >
> > > > /local/mnt/workspace/varada/varda-linux/arch/arm64/boot/dts/qcom/ipq9574-al02-c7.dtb: phy@7d000: 'power-domains' is a required property
> > > > From schema: /local/mnt/workspace/varada/varda-linux/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> > > > /local/mnt/workspace/varada/varda-linux/arch/arm64/boot/dts/qcom/ipq9574-al02-c7.dtb: usb@8a00000: 'power-domains' is a required property
> > > > From schema: /local/mnt/workspace/varada/varda-linux/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> > >
> > > No, I think it is not.
> >
> > There are no GDSCs in IPQ9574. Can you suggest how to proceed.
>
> You need to update the binding and either make the power domains
> property optional in the binding or dependent on the SoC.
>
> > > > + ssphy_0: phy@7d000 {
> > >
> > > Nit: usually the label usb_0_qmpphy
> > >
> > > > + compatible = "qcom,ipq9574-qmp-usb3-phy";
> > > > + reg = <0x0007d000 0xa00>;
> > > > + #phy-cells = <0>;
> > > > +
> > > > + clocks = <&gcc GCC_USB0_AUX_CLK>,
> > > > + <&xo_board_clk>,
> > > > + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
> > > > + <&gcc GCC_USB0_PIPE_CLK>;
> > > > + clock-names = "aux",
> > > > + "ref",
> > > > + "com_aux",
>
> This is not the right name for this clock so you need to update the
> binding first.
>
> Please be more careful.
Thanks for your feedback. Have posted v6 with the above corrections.
-Varada
>
> > > > + "pipe";
> > > > +
> > > > + resets = <&gcc GCC_USB0_PHY_BCR>,
> > > > + <&gcc GCC_USB3PHY_0_PHY_BCR>;
> > > > + reset-names = "phy",
> > > > + "phy_phy";
> > > > +
> > > > + vdda-pll-supply = <®_usb_1p8>;
> > > > + vdda-phy-supply = <®_usb_0p925>;
> > > > +
> > > > + status = "disabled";
> > > > +
> > > > + #clock-cells = <0>;
> > > > + clock-output-names = "usb0_pipe_clk";
> > > > + };
>
> Johan
