On Mon, 3 Apr 2023 at 17:46, Georgi Djakov <djakov@xxxxxxxxxx> wrote:
>
> Hi Bhupesh,
>
> On 2.04.23 13:05, Bhupesh Sharma wrote:
> > Add crypto engine (CE) and CE BAM related nodes and definitions to
> > 'sm8350.dtsi'.
> >
> > Co-developed-by and Signed-off-by: Robert Foss <rfoss@xxxxxxxxxx>
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/sm8350.dtsi | 22 ++++++++++++++++++++++
> > 1 file changed, 22 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > index 7fbc288eca58..090ee07d1800 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > @@ -1730,6 +1730,28 @@ ufs_mem_phy_lanes: phy@1d87400 {
> > };
> > };
> >
> > + cryptobam: dma-controller@1dc4000 {
> > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> > + reg = <0 0x01dc4000 0 0x24000>;
> > + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> > + #dma-cells = <1>;
> > + qcom,ee = <0>;
> > + qcom,controlled-remotely;
> > + iommus = <&apps_smmu 0x594 0x0011>,
> > + <&apps_smmu 0x596 0x0011>;
> > + };
> > +
> > + crypto: crypto@1dfa000 {
> > + compatible = "qcom,sm8350-qce", "qcom,sm8150-qce", "qcom,qce";
> > + reg = <0 0x01dfa000 0 0x6000>;
> > + dmas = <&cryptobam 4>, <&cryptobam 5>;
> > + dma-names = "rx", "tx";
> > + iommus = <&apps_smmu 0x594 0x0011>,
> > + <&apps_smmu 0x596 0x0011>;
> > + interconnects = <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
> > + interconnect-names = "memory";
>
> We switched to #interconnect-cells = <2> (since commit 4f287e31ff5f), so maybe #include
> dt-bindings/interconnect/qcom,icc.h and add the tags.
Sure Georgi, I will fix it in the next version.
Thanks,
Bhupesh
