On Tue, 14 Mar 2023 13:34:29 +0530, Manivannan Sadhasivam wrote:
> The Qualcomm LLCC/EDAC drivers were using a fixed register stride for
> accessing the (Control and Status Regsiters) CSRs of each LLCC bank.
> This offset only works for some SoCs like SDM845 for which driver support
> was initially added.
>
> But the later SoCs use different register stride that vary between the
> banks with holes in-between. So it is not possible to use a single register
> stride for accessing the CSRs of each bank. By doing so could result in a
> crash with the current drivers. So far this crash is not reported since
> EDAC_QCOM driver is not enabled in ARM64 defconfig and no one tested the
> driver extensively by triggering the EDAC IRQ (that's where each bank
> CSRs are accessed).
>
> [...]
Applied, thanks!
[03/14] arm64: dts: qcom: sdm845: Fix the base addresses of LLCC banks
commit: bfe088bde391824040c39cbf277d7fe782042936
[04/14] arm64: dts: qcom: sc7180: Fix the base addresses of LLCC banks
commit: 116a932bbc7bc740b068fbfe320a465811ca62f8
[05/14] arm64: dts: qcom: sc7280: Fix the base addresses of LLCC banks
commit: 62e5ee9db98ed67eb50205072135544055cba9c4
[06/14] arm64: dts: qcom: sc8280xp: Fix the base addresses of LLCC banks
commit: 0fe0955a79b994b8dcabe79f3a7192251fb256ea
[07/14] arm64: dts: qcom: sm8150: Fix the base addresses of LLCC banks
commit: c5ccf8d33f11f57ef46d12db1dda4afcc4d5150b
[08/14] arm64: dts: qcom: sm8250: Fix the base addresses of LLCC banks
commit: 42c9b1578233eeb3044656a446486bd2efc87312
[09/14] arm64: dts: qcom: sm8350: Fix the base addresses of LLCC banks
commit: 7ae317cba6be783cfd6155bceec91d0918f78fb8
[10/14] arm64: dts: qcom: sm8450: Fix the base addresses of LLCC banks
commit: 413c8ecd48f1df8034c7b13881ded33b3d10171f
[11/14] arm64: dts: qcom: sm6350: Fix the base addresses of LLCC banks
commit: 65d9975e5dae4601e8902765d08f55c246fd2022
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
