On 3/8/2023 9:14 PM, Konrad Dybcio wrote:
On 8.03.2023 16:39, Kathiravan T wrote:
On 3/8/2023 4:31 PM, Konrad Dybcio wrote:
On 7.03.2023 07:22, Kathiravan T wrote:
Document the compatible for IPQ5332 SCM.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Signed-off-by: Kathiravan T <quic_kathirav@xxxxxxxxxxx>
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Does this board not have a crypto engine / CE1 clock exposed via
RPMCC? It will be enabled by default, but Linux should be aware
of it, so that we don't gate it by accident.
IPQ5332 doesn't have the crypto engine and also it doesn't have RPMCC. Sorry, could you please help to explain how it is related to SCM?
SCM usually requires certain clocks to be up and that often includes
the CE1 clock on fairly recent designs.
Thanks for the explanation. I don't see such requirements for this SoC.
Konrad
Thanks, Kathiravan T.