The "mhi" region contains the debug registers that could be used to monitor
the PCIe link transitions.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 2f0e460acccd..1987ec97546a 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1821,11 +1821,12 @@ mmss_noc: interconnect@1740000 {
pcie0: pci@1c00000 {
compatible = "qcom,pcie-sm8250";
reg = <0 0x01c00000 0 0x3000>,
+ <0 0x01c03000 0 0x1000>,
<0 0x60000000 0 0xf1d>,
<0 0x60000f20 0 0xa8>,
<0 0x60001000 0 0x1000>,
<0 0x60100000 0 0x100000>;
- reg-names = "parf", "dbi", "elbi", "atu", "config";
+ reg-names = "parf", "mhi", "dbi", "elbi", "atu", "config";
device_type = "pci";
linux,pci-domain = <0>;
bus-range = <0x00 0xff>;
@@ -1930,11 +1931,12 @@ pcie0_lane: phy@1c06200 {
pcie1: pci@1c08000 {
compatible = "qcom,pcie-sm8250";
reg = <0 0x01c08000 0 0x3000>,
+ <0 0x01c0b000 0 0x1000>,
<0 0x40000000 0 0xf1d>,
<0 0x40000f20 0 0xa8>,
<0 0x40001000 0 0x1000>,
<0 0x40100000 0 0x100000>;
- reg-names = "parf", "dbi", "elbi", "atu", "config";
+ reg-names = "parf", "mhi", "dbi", "elbi", "atu", "config";
device_type = "pci";
linux,pci-domain = <1>;
bus-range = <0x00 0xff>;
@@ -2038,11 +2040,12 @@ pcie1_lane: phy@1c0e200 {
pcie2: pci@1c10000 {
compatible = "qcom,pcie-sm8250";
reg = <0 0x01c10000 0 0x3000>,
+ <0 0x01c13000 0 0x1000>,
<0 0x64000000 0 0xf1d>,
<0 0x64000f20 0 0xa8>,
<0 0x64001000 0 0x1000>,
<0 0x64100000 0 0x100000>;
- reg-names = "parf", "dbi", "elbi", "atu", "config";
+ reg-names = "parf", "mhi", "dbi", "elbi", "atu", "config";
device_type = "pci";
linux,pci-domain = <2>;
bus-range = <0x00 0xff>;
--
2.25.1
