On 16.02.2023 13:52, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx>
>
> Add two UART nodes that are known to be used by existing development
> boards with this SoC.
>
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 31 +++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index eda5d107961b..ce5976e36aee 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -489,6 +489,21 @@ &clk_virt SLAVE_QUP_CORE_1 0>,
> operating-points-v2 = <&qup_opp_table_100mhz>;
> status = "disabled";
> };
> +
> + uart12: serial@a94000 {
> + compatible = "qcom,geni-uart";
> + reg = <0x0 0xa94000 0x0 0x4000>;
The address part ought to be padded to 8 hex digits
> + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
> + clock-names = "se";
> + interconnects = <&clk_virt MASTER_QUP_CORE_1 0
Please use the bindings constants as pointed out in the previous replies.
> + &clk_virt SLAVE_QUP_CORE_1 0>,
> + <&gem_noc MASTER_APPSS_PROC 0
> + &config_noc SLAVE_QUP_1 0>;
> + interconnect-names = "qup-core", "qup-config";
> + power-domains = <&rpmhpd SA8775P_CX>;
> + status = "disabled";
> + };
> };
>
> qupv3_id_2: geniqup@8c0000 {
> @@ -524,6 +539,22 @@ &config_noc SLAVE_QUP_2 0>,
> status = "disabled";
> };
>
> + uart17: serial@88c000 {
> + compatible = "qcom,geni-uart";
> + reg = <0x0 0x88c000 0x0 0x4000>;
Ditto
> + interrupts-extended = <&intc GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>,
> + <&tlmm 94 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
> + clock-names = "se";
> + interconnects = <&clk_virt MASTER_QUP_CORE_2 0
> + &clk_virt SLAVE_QUP_CORE_2 0>,
Ditto
Konrad
> + <&gem_noc MASTER_APPSS_PROC 0
> + &config_noc SLAVE_QUP_2 0>;
> + interconnect-names = "qup-core", "qup-config";
> + power-domains = <&rpmhpd SA8775P_CX>;
> + status = "disabled";
> + };
> +
> i2c18: i2c@890000 {
> compatible = "qcom,geni-i2c";
> reg = <0x0 0x890000 0x0 0x4000>;
