On 24.02.2023 12:19, Krzysztof Kozlowski wrote: > On 23/02/2023 13:06, Konrad Dybcio wrote: >> GMU wrapper is essentially a register space within the GPU, which >> Linux sees as a dumbed-down regular GMU: there's no clocks, >> interrupts, multiple regs, iommus and OPP. Document it. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> >> --- >> .../devicetree/bindings/display/msm/gmu.yaml | 49 ++++++++++++++++------ >> 1 file changed, 37 insertions(+), 12 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml >> index ab14e81cb050..021373e686e1 100644 >> --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml >> +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml >> @@ -19,16 +19,18 @@ description: | >> >> properties: >> compatible: >> - items: >> - - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' >> - - const: qcom,adreno-gmu >> + oneOf: >> + - items: >> + - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' >> + - const: qcom,adreno-gmu >> + - const: qcom,adreno-gmu-wrapper > > Why wrapper is part of this binding then? Usually wrapper means there is > wrapper node with a GMU child (at least this is what we call for all > wrappers of custom IP blocks like USB DWC). Where is the child? "GMU wrapper" is a sorta confusing name that Qualcomm chose for the "fake GMU" which has the GMU_CX and GMU_GX registers responsible for things like powering up some GPU things internally and some perf/pwr counters. It is _not_ a wrapper in the sense of a parent-child relationship. The GMU wrapper has no HFI (Hardware Firmware Interface) to communicate through crafted messages, but relies on plain register accesses. Konrad > > > Best regards, > Krzysztof >
