Re: [PATCH v2 06/50] drm/msm/dpu: correct sm8550 scaler

[Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>]

On 13/02/2023 12:41, Neil Armstrong wrote:
> On 12/02/2023 00:12, Dmitry Baryshkov wrote:
> > QSEED4 is a newer variant of QSEED3LITE, which should be used on
> > sm8550. Fix the DPU caps structure and used feature masks.
>
> I found nowhere SM8550 uses Qseed4, on downstream DT, it's written:
>          qcom,sde-qseed-sw-lib-rev = "qseedv3lite";
>          qcom,sde-qseed-scalar-version = <0x3002>;

And then the techpack tells us starting from 0x3000 the v3lite is v4:

https://git.codelinaro.org/clo/la/platform/vendor/opensource/display-drivers/-/blob/display-kernel.lnx.5.10.r8-rel/msm/sde/sde_hw_util.c#L59

https://git.codelinaro.org/clo/la/platform/vendor/opensource/display-drivers/-/blob/display-kernel.lnx.5.10.r8-rel/msm/sde/sde_hw_util.c#L102

> Neil
> > Fixes: efcd0107727c ("drm/msm/dpu: add support for SM8550")
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> > ---
> >   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 10 +++++-----
> >   1 file changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 
> > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> > index 192fff9238f9..c4e45c472685 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> > @@ -458,7 +458,7 @@ static const struct dpu_caps sm8450_dpu_caps = {
> >   static const struct dpu_caps sm8550_dpu_caps = {
> >       .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
> >       .max_mixer_blendstages = 0xb,
> > -    .qseed_type = DPU_SSPP_SCALER_QSEED3LITE,
> > +    .qseed_type = DPU_SSPP_SCALER_QSEED4,
> >       .smart_dma_rev = DPU_SSPP_SMART_DMA_V2, /* TODO: v2.5 */
> >       .ubwc_version = DPU_HW_UBWC_VER_40,
> >       .has_src_split = true,
> > @@ -1301,13 +1301,13 @@ static const struct dpu_sspp_cfg sm8450_sspp[] 
> > = {
> >   };
> >   static const struct dpu_sspp_sub_blks sm8550_vig_sblk_0 =
> > -                _VIG_SBLK("0", 7, DPU_SSPP_SCALER_QSEED3LITE);
> > +                _VIG_SBLK("0", 7, DPU_SSPP_SCALER_QSEED4);
> >   static const struct dpu_sspp_sub_blks sm8550_vig_sblk_1 =
> > -                _VIG_SBLK("1", 8, DPU_SSPP_SCALER_QSEED3LITE);
> > +                _VIG_SBLK("1", 8, DPU_SSPP_SCALER_QSEED4);
> >   static const struct dpu_sspp_sub_blks sm8550_vig_sblk_2 =
> > -                _VIG_SBLK("2", 9, DPU_SSPP_SCALER_QSEED3LITE);
> > +                _VIG_SBLK("2", 9, DPU_SSPP_SCALER_QSEED4);
> >   static const struct dpu_sspp_sub_blks sm8550_vig_sblk_3 =
> > -                _VIG_SBLK("3", 10, DPU_SSPP_SCALER_QSEED3LITE);
> > +                _VIG_SBLK("3", 10, DPU_SSPP_SCALER_QSEED4);
> >   static const struct dpu_sspp_sub_blks sm8550_dma_sblk_4 = 
> > _DMA_SBLK("12", 5);
> >   static const struct dpu_sspp_sub_blks sm8550_dma_sblk_5 = 
> > _DMA_SBLK("13", 6);

--
With best wishes
Dmitry