Re: [PATCH v3 2/2] clk: qcom: Add MSM8916 Global Clock Controller support

[Stephen Boyd <sboyd@xxxxxxxxxxxxxx>]

On 03/18, Georgi Djakov wrote:
> +
> +enum {
> +	P_XO,
> +	P_GPLL0,
> +	P_GPLL0_AUX,
> +	P_BIMC,
> +	P_GPLL1,
> +	P_GPLL1_AUX,
> +	P_GPLL2,
> +	P_GPLL2_AUX,
> +	P_SLEEP_CLK,
> +	P_DSI0_PHYPLL_BYTE,
> +	P_DSI0_PHYPLL_DSI,
> +};
> +
> +static const struct parent_map gcc_xo_gpll0_map[] = {
> +	{ P_XO, 0 },
> +	{ P_GPLL0, 1 },
> +	{ }

This doesn't have the updated tables. I fixed it up locally and
applied it.

diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c
index c961f0dfdd2a..d3458474eb3a 100644
--- a/drivers/clk/qcom/gcc-msm8916.c
+++ b/drivers/clk/qcom/gcc-msm8916.c
@@ -49,7 +49,6 @@ enum {
 static const struct parent_map gcc_xo_gpll0_map[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0, 1 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0[] = {
@@ -61,7 +60,6 @@ static const struct parent_map gcc_xo_gpll0_bimc_map[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0, 1 },
 	{ P_BIMC, 2 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0_bimc[] = {
@@ -75,7 +73,6 @@ static const struct parent_map gcc_xo_gpll0a_gpll1_gpll2a_map[] = {
 	{ P_GPLL0_AUX, 3 },
 	{ P_GPLL2_AUX, 2 },
 	{ P_GPLL1, 1 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0a_gpll1_gpll2a[] = {
@@ -89,7 +86,6 @@ static const struct parent_map gcc_xo_gpll0_gpll2_map[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0, 1 },
 	{ P_GPLL2, 2 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0_gpll2[] = {
@@ -101,7 +97,6 @@ static const char *gcc_xo_gpll0_gpll2[] = {
 static const struct parent_map gcc_xo_gpll0a_map[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0_AUX, 2 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0a[] = {
@@ -114,7 +109,6 @@ static const struct parent_map gcc_xo_gpll0_gpll1a_sleep_map[] = {
 	{ P_GPLL0, 1 },
 	{ P_GPLL1_AUX, 2 },
 	{ P_SLEEP_CLK, 6 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0_gpll1a_sleep[] = {
@@ -128,7 +122,6 @@ static const struct parent_map gcc_xo_gpll0_gpll1a_map[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0, 1 },
 	{ P_GPLL1_AUX, 2 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0_gpll1a[] = {
@@ -140,7 +133,6 @@ static const char *gcc_xo_gpll0_gpll1a[] = {
 static const struct parent_map gcc_xo_dsibyte_map[] = {
 	{ P_XO, 0, },
 	{ P_DSI0_PHYPLL_BYTE, 2 },
-	{ }
 };
 
 static const char *gcc_xo_dsibyte[] = {
@@ -152,7 +144,6 @@ static const struct parent_map gcc_xo_gpll0a_dsibyte_map[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0_AUX, 2 },
 	{ P_DSI0_PHYPLL_BYTE, 1 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0a_dsibyte[] = {
@@ -165,7 +156,6 @@ static const struct parent_map gcc_xo_gpll0_dsiphy_map[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0, 1 },
 	{ P_DSI0_PHYPLL_DSI, 2 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0_dsiphy[] = {
@@ -178,7 +168,6 @@ static const struct parent_map gcc_xo_gpll0a_dsiphy_map[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0_AUX, 2 },
 	{ P_DSI0_PHYPLL_DSI, 1 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0a_dsiphy[] = {
@@ -192,7 +181,6 @@ static const struct parent_map gcc_xo_gpll0a_gpll1_gpll2_map[] = {
 	{ P_GPLL0_AUX, 1 },
 	{ P_GPLL1, 3 },
 	{ P_GPLL2, 2 },
-	{ }
 };
 
 static const char *gcc_xo_gpll0a_gpll1_gpll2[] = {

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