On Sat, Mar 21, 2015 at 7:50 AM, Georgi Djakov <georgi.djakov@xxxxxxxxxx> wrote: > Some versions of this controller do not advertise their 3.0v and > 8bit bus-width support capabilities. It is required to explicitly > set these capabilities for the specific controller versions. > [..] > diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c [..] > + > +#define CORE_VENDOR_SPEC_CAPABILITIES0 0x11c > +#define CORE_8_BIT_SUPPORT BIT(18) > +#define CORE_3_0V_SUPPORT BIT(25) The $11c register is specified to drive the lower capability register directly, hence you should use the sdhci defines for these bits instead of duplicating them here; SDHCI_CAN_DO_8BIT and SDHCI_CAN_VDD_300 that is. I'm sorry for missing this when looking at v1 :/ Regards, Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
