On Wed, Feb 01, 2023 at 05:07:40PM +0100, Stephan Gerhold wrote:
> On Wed, Feb 01, 2023 at 04:30:19PM +0100, Krzysztof Kozlowski wrote:
> > Correct the number of GPIOs in gpio-ranges to match reality.
> >
> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
>
> AFAICT the current gpio-ranges do match the number of GPIOs (ngpios) in
> the pinctrl drivers for all/most of the platforms you update below. It
> looks like the special UFS_RESET pins are also exported as GPIOs in
> addition to the real GPIOs. I'm not sure if this is intended or a
> mistake.
>
It looks like this is on purpose:
---
>From 53a5372ce326116f3e3d3f1d701113b2542509f4 Mon Sep 17 00:00:00 2001
From: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
Date: Tue, 4 Jun 2019 00:19:59 -0700
Subject: [PATCH] pinctrl: qcom: sdm845: Expose ufs_reset as gpio
The ufs_reset pin is expected to be wired to the reset pin of the
primary UFS memory but is pretty much just a general purpose output pinr
Reorder the pins and expose it as gpio 150, so that the UFS driver can
toggle it.
---
And it's used in sdm845-mtp.dts:
&ufs_mem_hc {
reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
};
So I think this patch (together with the DT ones you sent) should be
dropped because it would prevent using the UFS_RESET as GPIO since it's
no longer included in gpio-ranges.
Thanks,
Stephan
