Hi, In order to track the changes of dt-binding, please add the info as following: diff --git a/MAINTAINERS b/MAINTAINERS index 7f86d02cb427..e13e61218987 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6047,6 +6047,7 @@ S: Maintained T: git git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux.git F: Documentation/devicetree/bindings/devfreq/ F: Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml +F: Documentation/devicetree/bindings/interconnect/qcom,cci.yam F: drivers/devfreq/ F: include/linux/devfreq.h F: include/trace/events/devfreq.h On 23. 2. 1. 17:02, Jun Nie wrote: > Add devicetree binding of Qualcomm CCI on MSM8939. > > Signed-off-by: Jun Nie <jun.nie@xxxxxxxxxx> > --- > .../bindings/interconnect/qcom,cci.yaml | 81 +++++++++++++++++++ > 1 file changed, 81 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,cci.yaml > > diff --git a/Documentation/devicetree/bindings/interconnect/qcom,cci.yaml b/Documentation/devicetree/bindings/interconnect/qcom,cci.yaml > new file mode 100644 > index 000000000000..100c440ba220 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interconnect/qcom,cci.yaml > @@ -0,0 +1,81 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interconnect/mediatek,cci.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Cache Coherent Interconnect (CCI) frequency and voltage scaling > + > +maintainers: > + - Jun Nie <jun.nie@xxxxxxxxxx> > + > +description: | > + Qualcomm Cache Coherent Interconnect (CCI) is a hardware engine used by > + MSM8939. The driver is to scale its frequency and adjust the voltage in > + hardware accordingly. The voltage provider is modeled as power domain on > + MSM8939, so power domain dts node is required. > + > +properties: > + compatible: > + enum: > + - qcom,msm8939-cci > + > + clocks: > + maxItems: 1 > + > + operating-points-v2: true > + opp-table: > + type: object > + > +required: > + - compatible > + - clocks > + - operating-points-v2 > + - nvmem-cells > + - power-domains > + > +additionalProperties: false > + > +examples: > + - | > + cci: cci { > + compatible = "qcom,msm8939-cci"; > + clocks = <&apcs2>; > + operating-points-v2 = <&cci_opp_table>; > + power-domains = <&cpr>; > + nvmem-cells = <&cpr_efuse_speedbin_pvs>; > + }; > + > + cci_opp_table: cci-opp-table { > + compatible = "operating-points-v2"; > + > + cci_opp1: opp-200000000 { > + opp-hz = /bits/ 64 <200000000>; > + opp-supported-hw = <0x3f>; > + required-opps = <&cpr_opp3>; > + }; > + > + cci_opp2: opp-297600000 { > + opp-hz = /bits/ 64 <297600000>; > + opp-supported-hw = <0x3f>; > + required-opps = <&cpr_opp12>; > + }; > + > + cci_opp3: opp-400000000 { > + opp-hz = /bits/ 64 <400000000>; > + opp-supported-hw = <0x1>; > + required-opps = <&cpr_opp14>; > + }; > + > + cci_opp4: opp-400000000 { > + opp-hz = /bits/ 64 <400000000>; > + opp-supported-hw = <0x3e>; > + required-opps = <&cpr_opp15>; > + }; > + > + cci_opp5: opp-595200000 { > + opp-hz = /bits/ 64 <595200000>; > + opp-supported-hw = <0x3f>; > + required-opps = <&cpr_opp17>; > + }; > + }; -- Best Regards, Samsung Electronics Chanwoo Choi
