On 31.01.2023 10:25, Dmitry Baryshkov wrote: > On 31/01/2023 01:59, Konrad Dybcio wrote: >> Add support for the GPU clock controller found on SM6115. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> >> --- >> drivers/clk/qcom/Kconfig | 9 + >> drivers/clk/qcom/Makefile | 1 + >> drivers/clk/qcom/gpucc-sm6115.c | 512 ++++++++++++++++++++++++++++++++ >> 3 files changed, 522 insertions(+) >> create mode 100644 drivers/clk/qcom/gpucc-sm6115.c > > [skipped] > >> +static int gpu_cc_sm6115_probe(struct platform_device *pdev) >> +{ >> + struct regmap *regmap; >> + unsigned int value, mask; >> + >> + regmap = qcom_cc_map(pdev, &gpu_cc_sm6115_desc); >> + if (IS_ERR(regmap)) >> + return PTR_ERR(regmap); >> + >> + clk_alpha_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); >> + clk_alpha_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); >> + >> + /* Recommended WAKEUP/SLEEP settings for the gpu_cc_cx_gmu_clk */ >> + mask = CX_GMU_CBCR_WAKE_MASK << CX_GMU_CBCR_WAKE_SHIFT; >> + mask |= CX_GMU_CBCR_SLEEP_MASK << CX_GMU_CBCR_SLEEP_SHIFT; >> + value = 0xf << CX_GMU_CBCR_WAKE_SHIFT | 0xf << CX_GMU_CBCR_SLEEP_SHIFT; >> + regmap_update_bits(regmap, gpu_cc_cx_gmu_clk.clkr.enable_reg, mask, value); >> + >> + /* Set up PERIPH/MEM retain on the GPU core clock */ >> + regmap_update_bits(regmap, gpu_cc_gx_gfx3d_clk.halt_reg, >> + (BIT(14) | BIT(13)), (BIT(14) | BIT(13))); > > But you have your new helpers to set these values, don't you? Welp, that's what I get for managing 3 almost-identical drivers at once ;) Will fix. Konrad > >> + >> + return qcom_cc_really_probe(pdev, &gpu_cc_sm6115_desc, regmap); >> +} >> + >> +static struct platform_driver gpu_cc_sm6115_driver = { >> + .probe = gpu_cc_sm6115_probe, >> + .driver = { >> + .name = "sm6115-gpucc", >> + .of_match_table = gpu_cc_sm6115_match_table, >> + }, >> +}; >> +module_platform_driver(gpu_cc_sm6115_driver); >> + >> +MODULE_DESCRIPTION("QTI GPU_CC SM6115 Driver"); >> +MODULE_LICENSE("GPL"); >