This series brings GPUCC support and the correlated bindings for three midrange SoCs, all of which host a GMU-less A6xx GPU. Konrad Dybcio (8): clk: qcom: branch: Add helper functions for setting retain bits clk: qcom: branch: Add SLEEP/WAKE fields definitions dt-bindings: clock: Add Qcom SM6125 GPUCC clk: qcom: Add GPU clock controller driver for SM6125 dt-bindings: clock: Add Qcom SM6375 GPUCC clk: qcom: Add GPU clock controller driver for SM6375 dt-bindings: clock: Add Qcom SM6115 GPUCC clk: qcom: Add GPU clock controller driver for SM6115 .../bindings/clock/qcom,sm6115-gpucc.yaml | 58 ++ .../bindings/clock/qcom,sm6125-gpucc.yaml | 64 +++ .../bindings/clock/qcom,sm6375-gpucc.yaml | 60 ++ drivers/clk/qcom/Kconfig | 27 + drivers/clk/qcom/Makefile | 3 + drivers/clk/qcom/clk-branch.h | 25 + drivers/clk/qcom/gpucc-sm6115.c | 512 ++++++++++++++++++ drivers/clk/qcom/gpucc-sm6125.c | 424 +++++++++++++++ drivers/clk/qcom/gpucc-sm6375.c | 469 ++++++++++++++++ include/dt-bindings/clock/qcom,sm6115-gpucc.h | 36 ++ include/dt-bindings/clock/qcom,sm6125-gpucc.h | 31 ++ include/dt-bindings/clock/qcom,sm6375-gpucc.h | 36 ++ 12 files changed, 1745 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml create mode 100644 drivers/clk/qcom/gpucc-sm6115.c create mode 100644 drivers/clk/qcom/gpucc-sm6125.c create mode 100644 drivers/clk/qcom/gpucc-sm6375.c create mode 100644 include/dt-bindings/clock/qcom,sm6115-gpucc.h create mode 100644 include/dt-bindings/clock/qcom,sm6125-gpucc.h create mode 100644 include/dt-bindings/clock/qcom,sm6375-gpucc.h -- 2.39.1
