When FEC enabled, it introduces 2.5% overhead into link capacity.
This factor have to be considered into calculation supported bpp.
Signed-off-by: Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx>
---
drivers/gpu/drm/msm/dp/dp_panel.c | 45 +++++++++++++++++++++++++++++++++------
1 file changed, 38 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_panel.c
index 5078247..36dad05 100644
--- a/drivers/gpu/drm/msm/dp/dp_panel.c
+++ b/drivers/gpu/drm/msm/dp/dp_panel.c
@@ -11,7 +11,7 @@
#include <drm/drm_edid.h>
#include <drm/drm_print.h>
-#define DSC_TGT_BPP 8
+#define DSC_TGT_BPP 10
struct dp_panel_private {
struct device *dev;
@@ -122,20 +122,51 @@ static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel,
u32 mode_edid_bpp, u32 mode_pclk_khz)
{
struct dp_link_info *link_info;
- const u32 max_supported_bpp = 30, min_supported_bpp = 18;
- u32 bpp = 0, data_rate_khz = 0;
+ struct dp_panel_private *panel;
+ const u32 max_supported_bpp = 30;
+ u32 min_supported_bpp = 18;
+ u32 bpp = 0, link_bitrate = 0, mode_bitrate;
+ s64 rate_fp = 0;
+
+ panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
+
+ if (dp_panel->dsc_en)
+ min_supported_bpp = 24;
bpp = min_t(u32, mode_edid_bpp, max_supported_bpp);
link_info = &dp_panel->link_info;
- data_rate_khz = link_info->num_lanes * link_info->rate * 8;
- while (bpp > min_supported_bpp) {
- if (mode_pclk_khz * bpp <= data_rate_khz)
+ rate_fp = drm_int2fixp(link_info->num_lanes * link_info->rate * 8);
+
+ if (dp_panel->fec_en)
+ rate_fp = drm_fixp_div(rate_fp, dp_panel->fec_overhead_fp);
+
+ link_bitrate = drm_fixp2int(rate_fp);
+
+ for (; bpp > min_supported_bpp; bpp -= 6) {
+ if (dp_panel->dsc_en) {
+ if (bpp == 30 && !(dp_panel->sink_dsc_caps.color_depth & DP_DSC_10_BPC))
+ continue;
+ else if (bpp == 24 && !(dp_panel->sink_dsc_caps.color_depth & DP_DSC_8_BPC))
+ continue;
+
+ mode_bitrate = mode_pclk_khz * DSC_TGT_BPP;
+ } else {
+ mode_bitrate = mode_pclk_khz * bpp;
+ }
+
+ if (mode_bitrate <= link_bitrate)
break;
- bpp -= 6;
}
+ if (bpp < min_supported_bpp)
+ DRM_ERROR("bpp %d is below minimum supported bpp %d\n", bpp,
+ min_supported_bpp);
+
+ if (dp_panel->dsc_en && bpp != 24 && bpp != 30 && bpp != 36)
+ DRM_ERROR("bpp %d is not supported when dsc is enabled\n", bpp);
+
return bpp;
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
