On Mon Jan 23, 2023 at 1:03 PM CET, Johan Hovold wrote: > On Mon, Jan 23, 2023 at 12:22:32PM +0100, Luca Weiss wrote: > > On Mon Jan 23, 2023 at 12:15 PM CET, Dmitry Baryshkov wrote: > > > > There are two SERDES regions. One used by USB part of the PHY (at > > > 0x1000) and another SERDES region used for DP (at 0x2000). As Johan > > > described below, vendor kernel handles the DP regions in the DP driver. > > > Possibly this caused a confusion on your side. > > > > Ack, I think I got it now. I also see the registers used downstream > > now, e.g.: > > > > techpack/display/pll/dp_pll_10nm_util.c:#define QSERDES_COM_LOCK_CMP2_MODE0 0x009C > > > > So now .dp_serdes should be 0x2000. Do I need to change anything else > > also? I think not? > > You also need to add new dp_tx/rx pointers to the offset struct and use > those in favour of the current ones if set. I think we hashed that bit > out in one of the previous versions of this patch. Thanks for the persistent help, I've sent out v4 now, I hope that's good now and we can get this into v6.3 :) > > Johan
