Re: [PATCH v3 0/8] clk: qcom: msm8996: add support for the CBF clock

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Hi Dmitry,

On Fri, 20 Jan 2023 at 15:18, Dmitry Baryshkov
<dmitry.baryshkov@xxxxxxxxxx> wrote:
>
> On 20/01/2023 17:08, Simon Glass wrote:
> > Hi Dmitry,
> >
> > On Thu, 19 Jan 2023 at 23:14, Dmitry Baryshkov
> > <dmitry.baryshkov@xxxxxxxxxx> wrote:
> >>
> >> On MSM8996 two CPU clusters are interconnected using the Core Bus
> >> Fabric (CBF). In order for the CPU clusters to function properly, it
> >> should be clocked following the core's frequencies to provide adequate
> >> bandwidth. On the other hand the CBF's clock rate can be used by other
> >> drivers (e.g. by the pending SPDM driver to provide input on the CPU
> >> performance).
> >>
> >> Thus register CBF as a clock (required for CPU to boot) and add a tiny
> >> interconnect layer on top of it to let cpufreq/opp scale the CBF clock.
> >>
> >> Dependencies: [1]
> >>
> >> [1] https://lore.kernel.org/linux-arm-msm/20230111191453.2509468-1-dmitry.baryshkov@xxxxxxxxxx/
> >>
> >> Changes since v2:
> >> - Added interconnect-related bindings
> >> - Switched CPU and CBF clocks to RPM_SMD_XO_A_CLK_SRC
> >>
> >> Changes since v1:
> >> - Relicensed schema to GPL-2.0 + BSD-2-Clause (Krzysztof)
> >> - Changed clock driver to use parent_hws (Konrad)
> >> - Fixed indentation in CBF clock driver (Konrad)
> >> - Changed MODULE_LICENSE of CBF clock driver to GPL from GPL-v2
> >> - Switched CBF to use RPM_SMD_XO_CLK_SRC as one of the parents
> >> - Enabled RPM_SMD_XO_CLK_SRC on msm8996 platform and switch to it from
> >>    RPM_SMD_BB_CLK1 clock
> >>
> >> Dmitry Baryshkov (8):
> >>    dt-bindings: clock: qcom,msm8996-cbf: Describe the MSM8996 CBF clock
> >>      controller
> >>    dt-bindints: interconnect/msm8996-cbf: add defines to be used by CBF
> >>    clk: qcom: add msm8996 Core Bus Framework (CBF) support
> >>    clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq
> >>    clk: qcom: smd-rpm: provide RPM_SMD_XO_CLK_SRC on MSM8996 platform
> >>    arm64: qcom: dts: msm8996 switch from RPM_SMD_BB_CLK1 to
> >>      RPM_SMD_XO_CLK_SRC
> >>    arm64: dts: qcom: msm8996: add CBF device entry
> >>    arm64: dts: qcom: msm8996: scale CBF clock according to the CPUfreq
> >>
> >>   .../bindings/clock/qcom,msm8996-cbf.yaml      |  53 ++
> >>   arch/arm64/boot/dts/qcom/msm8996.dtsi         |  72 ++-
> >>   drivers/clk/qcom/Makefile                     |   2 +-
> >>   drivers/clk/qcom/clk-cbf-8996.c               | 458 ++++++++++++++++++
> >>   drivers/clk/qcom/clk-smd-rpm.c                |   2 +
> >>   .../interconnect/qcom,msm8996-cbf.h           |  12 +
> >>   6 files changed, 591 insertions(+), 8 deletions(-)
> >>   create mode 100644 Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml
> >>   create mode 100644 drivers/clk/qcom/clk-cbf-8996.c
> >>   create mode 100644 include/dt-bindings/interconnect/qcom,msm8996-cbf.h
> >>
> >> --
> >> 2.39.0
> >>
> >
> > Could you please tell me which dev board this is targeting and where I
> > can get one?
>
> This is targeting db820c, which is available from arrow.com. Note, this
> patchset is related only msm8996 aka Snapdragon 820, it has limited
> applicability to msm8996-pro and is of no concern to most of other chipsets.

Thanks!

>
> > Also could you please point me to the SoC documentation?
>
> https://developer.qualcomm.com/hardware/apq-8096sg/tools

Which doc has the register descriptions for I2C, etc.? I am not seeing it.

Regards,
Simon



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