Hi Ivan,
On Tue, 24 Feb 2015 13:01:08 +0200
"Ivan T. Ivanov" <iivanov@xxxxxxxxxx> wrote:
>
> Hi Gilad,
>
> One more comment :-).
>
> On Thu, 2015-02-19 at 15:54 -0700, Gilad Avidov wrote:
>
> <snip>
>
>
> -static int pmic_arb_wait_for_done(struct spmi_controller *ctrl)
> +static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
> + void __iomem *base,
> u8 sid, u16 addr) {
> struct spmi_pmic_arb_dev *dev =
> spmi_controller_get_drvdata(ctrl); u32 status = 0;
> u32 timeout = PMIC_ARB_TIMEOUT_US;
> - u32 offset = PMIC_ARB_STATUS(dev->channel);
> + u32 offset = dev->ver_ops->offset(dev, sid, addr) +
> PMIC_ARB_STATUS;
>
>
> while (timeout--) {
> status = pmic_arb_base_read(dev, offset);
>
> I see that downstream driver is using read or write base address
> based on operation for which we are waiting (read_cmd/write_cmd).
>
> Should this be reflected here?
Good catch, it should (although it still works fine).
I'll fix that.
Gilad.
>
> Ivan.
>
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