On Thu, Jan 12, 2023 at 03:05:42PM +0200, Abel Vesa wrote:
> Add SM8550 specific register layout and table configs.
>
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 100 ++++++++++++++++++++++++
> 1 file changed, 100 insertions(+)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> index 5936a3a05002..a9b666f32f59 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
> @@ -95,6 +95,13 @@ static const unsigned int sm8150_ufsphy_regs_layout[QPHY_LAYOUT_SIZE] = {
> [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V4_PCS_UFS_POWER_DOWN_CONTROL,
> };
>
> +static const char * const sm8550_ufs_phy_clk_l[] = {
> + "qref", "ref",
> +};
These clocks would to be added to the binding too, but based on:
https://lore.kernel.org/r/20230112135926.1572191-1-abel.vesa@xxxxxxxxxx
you really don't need these at all and what you call 'qref'
(GCC_UFS_PHY_PHY_AUX_CLK) is just 'ref_aux' below.
> +
> static const char * const sdm845_ufs_phy_clk_l[] = {
> "ref", "ref_aux",
> };
> @@ -721,6 +787,15 @@ static const struct qmp_ufs_offsets qmp_ufs_offsets_v5 = {
> .rx2 = 0xa00,
> };
>
> +static const struct qmp_ufs_offsets qmp_ufs_offsets_v6 = {
> + .serdes = 0,
> + .pcs = 0x400,
Zero pad .pcs to 4 digits?
> + .tx = 0x1000,
> + .rx = 0x1200,
> + .tx2 = 0x1800,
> + .rx2 = 0x1a00,
> +};
Johan
