Move the #address-cells and #size-cells properties on the existing i2c nodes below the reg property so that all of the address-related properties are grouped together. Signed-off-by: Brian Masney <bmasney@xxxxxxxxxx> Link: https://lore.kernel.org/lkml/Y6Wnh+tXPhF6aC1b@xxxxxxxxxxxxxxxxxxxx/ --- New patch introduced in v4 arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 109c9d2b684d..c0ffca9c9ddb 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -830,11 +830,11 @@ qup2_uart17: serial@884000 { qup2_i2c5: i2c@894000 { compatible = "qcom,geni-i2c"; reg = <0 0x00894000 0 0x4000>; + #address-cells = <1>; + #size-cells = <0>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; power-domains = <&rpmhpd SC8280XP_CX>; interconnects = <&clk_virt MASTER_QUP_CORE_2 0 &clk_virt SLAVE_QUP_CORE_2 0>, <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_2 0>, @@ -861,11 +861,11 @@ qup0: geniqup@9c0000 { qup0_i2c4: i2c@990000 { compatible = "qcom,geni-i2c"; reg = <0 0x00990000 0 0x4000>; + #address-cells = <1>; + #size-cells = <0>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; power-domains = <&rpmhpd SC8280XP_CX>; interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, -- 2.39.0
