On 24.12.2022 16:42, Krzysztof Kozlowski wrote:
> Bindings expect GCC clocks in other order:
>
> sm8450-hdk.dtb: clock-controller@100000: clock-names:1: 'sleep_clk' was expected
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Konrad
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index e1df3dad70fb..bb84bf3899b5 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -731,13 +731,13 @@ gcc: clock-controller@100000 {
> #reset-cells = <1>;
> #power-domain-cells = <1>;
> clocks = <&rpmhcc RPMH_CXO_CLK>,
> + <&sleep_clk>,
> <&pcie0_lane>,
> - <&pcie1_lane>,
> - <&sleep_clk>;
> + <&pcie1_lane>;
> clock-names = "bi_tcxo",
> + "sleep_clk",
> "pcie_0_pipe_clk",
> - "pcie_1_pipe_clk",
> - "sleep_clk";
> + "pcie_1_pipe_clk";
> };
>
> gpi_dma2: dma-controller@800000 {
