Add compatible for EPSS CPUFREQ-HW on SM8550.
Also document the interrupts.
Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
---
.../devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
index e58c55f78aaa..83d814afc780 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
@@ -27,6 +27,7 @@ properties:
- enum:
- qcom,sm6375-cpufreq-epss
- qcom,sm8250-cpufreq-epss
+ - qcom,sm8550-cpufreq-epss
- const: qcom,cpufreq-epss
reg:
@@ -53,6 +54,12 @@ properties:
- const: xo
- const: alternate
+ interrupts:
+ maxItems: 3
+
+ interrupt-names:
+ maxItems: 3
+
'#freq-domain-cells':
const: 1
--
2.34.1
