'cpus' is a common property, and it is now defined in dtschema schemas,
so drop the type references in the tree.
Signed-off-by: Rob Herring <robh@xxxxxxxxxx>
---
.../devicetree/bindings/interrupt-controller/apple,aic.yaml | 1 -
Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml | 3 ---
Documentation/devicetree/bindings/power/renesas,apmu.yaml | 6 ++----
Documentation/devicetree/bindings/thermal/qcom-lmh.yaml | 2 +-
4 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
index e18107eafe7c..698588e9aa86 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
@@ -90,7 +90,6 @@ properties:
maximum: 5
cpus:
- $ref: /schemas/types.yaml#/definitions/phandle-array
description:
Should be a list of phandles to CPU nodes (as described in
Documentation/devicetree/bindings/arm/cpus.yaml).
diff --git a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
index c87821be158b..a740378ed592 100644
--- a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
+++ b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
@@ -32,11 +32,8 @@ properties:
- description: nCLUSTERPMUIRQ interrupt
cpus:
- $ref: /schemas/types.yaml#/definitions/phandle-array
minItems: 1
maxItems: 12
- items:
- maxItems: 1
description: List of phandles for the CPUs connected to this DSU instance.
required:
diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.yaml b/Documentation/devicetree/bindings/power/renesas,apmu.yaml
index f2cc89e7f4e4..2b4d802ef4b2 100644
--- a/Documentation/devicetree/bindings/power/renesas,apmu.yaml
+++ b/Documentation/devicetree/bindings/power/renesas,apmu.yaml
@@ -34,10 +34,8 @@ properties:
maxItems: 1
cpus:
- $ref: /schemas/types.yaml#/definitions/phandle-array
- items:
- minItems: 1
- maxItems: 4
+ minItems: 1
+ maxItems: 4
description: |
Array of phandles pointing to CPU cores, which should match the order of
CPU cores used by the WUPCR and PSTR registers in the Advanced Power
diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
index e1587ddf7de3..92762efc2120 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
@@ -37,7 +37,7 @@ properties:
cpus:
description:
phandle of the first cpu in the LMh cluster
- $ref: /schemas/types.yaml#/definitions/phandle
+ maxItems: 1
qcom,lmh-temp-arm-millicelsius:
description:
--
2.35.1
