On Tue, Dec 16, 2014 at 10:18 AM, Bjorn Andersson <bjorn@xxxxxxx> wrote: > We are routing the regulators straight to vdd of the memory and should > hence use vmmc to specify this. However unless I actually program 0x29 > in the Qualcomm sdhci block I get no responses from the card. > > Which I believe is correct behavior as the SDHC specification [1] says > the following about BIT(0) of 0x29: > > "If this bit is cleared, the Host Controller shall immediately stop > driving CMD and DAT[3:0] (tri-state) and drive SDCLK to low level". > > > So I think 52221610d is indeed incorrect. > > [1] https://www.sdcard.org/downloads/pls/simplified_specs/archive/partA2_300.pdf Agreed. Host controllers that fail to implement the required internal regulator configured via bits 1-3 of the Power Control Register may still follow the specification with regard to bit zero of that same register. The driver should be updated to configure bit zero appropriately even when an external regulator is used. If you like, I can propose a patch or if you have one ready, I will be happy to review yours. Thanks, Tim Kryger -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
