On 14/10/2022 18:10, Melody Olvera wrote: > Add pin control driver for the TLMM block found in the QDU1000 > and QRU1000 SoC. > > Signed-off-by: Melody Olvera <quic_molvera@xxxxxxxxxxx> > --- > drivers/pinctrl/qcom/Kconfig | 9 + > drivers/pinctrl/qcom/Makefile | 1 + > drivers/pinctrl/qcom/pinctrl-qdu1000.c | 1274 ++++++++++++++++++++++++ > 3 files changed, 1284 insertions(+) > create mode 100644 drivers/pinctrl/qcom/pinctrl-qdu1000.c > > diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig > index 9dc2d803a586..4ab857dc2847 100644 > --- a/drivers/pinctrl/qcom/Kconfig > +++ b/drivers/pinctrl/qcom/Kconfig > @@ -248,6 +248,15 @@ config PINCTRL_QCOM_SSBI_PMIC > which are using SSBI for communication with SoC. Example PMIC's > devices are pm8058 and pm8921. > > +config PINCTRL_QDU1000 > + tristate "Qualcomm Tehcnologies Inc QDU1000/QRU1000 pin controller driver" > + depends on GPIOLIB && OF depends on ARM64 || COMPILE_TEST > + depends on PINCTRL_MSM > + help > + This is the pinctrl, pinmux, pinconf, and gpiolib driver for the > + Qualcomm Technologies Inc TLMM block found on the Qualcomm > + Technologies Inc QDU1000 and QRU1000 platforms. > + (...) > + PINCTRL_PIN(138, "GPIO_138"), > + PINCTRL_PIN(139, "GPIO_139"), > + PINCTRL_PIN(140, "GPIO_140"), > + PINCTRL_PIN(141, "GPIO_141"), > + PINCTRL_PIN(142, "GPIO_142"), > + PINCTRL_PIN(143, "GPIO_143"), > + PINCTRL_PIN(144, "GPIO_144"), > + PINCTRL_PIN(145, "GPIO_145"), > + PINCTRL_PIN(146, "GPIO_146"), > + PINCTRL_PIN(147, "GPIO_147"), > + PINCTRL_PIN(148, "GPIO_148"), > + PINCTRL_PIN(149, "GPIO_149"), > + PINCTRL_PIN(150, "GPIO_150"), Your bindings said you have GPIOs 0-149, not 0-150. > + PINCTRL_PIN(151, "SDC1_RCLK"), > + PINCTRL_PIN(152, "SDC1_CLK"), > + PINCTRL_PIN(153, "SDC1_CMD"), > + PINCTRL_PIN(154, "SDC1_DATA"), This also does not match bindings. Best regards, Krzysztof
