On 28/09/2022 16:59, Dmitry Baryshkov wrote:
> Add second DSI host and PHY available on the msm8974 platform.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> ---
> arch/arm/boot/dts/qcom-msm8974.dtsi | 78 +++++++++++++++++++++++++++++
> 1 file changed, 78 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
> index 7a9be0acf3f5..810a163ca14f 100644
> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
> @@ -1541,6 +1541,13 @@ mdp5_intf1_out: endpoint {
> remote-endpoint = <&dsi0_in>;
> };
> };
> +
> + port@1 {
> + reg = <1>;
> + mdp5_intf2_out: endpoint {
> + remote-endpoint = <&dsi1_in>;
> + };
> + };
> };
> };
>
> @@ -1614,6 +1621,77 @@ dsi0_phy: dsi-phy@fd922a00 {
>
> status = "disabled";
> };
> +
> + dsi1: dsi@fd922e00 {
> + compatible = "qcom,mdss-dsi-ctrl";
> + reg = <0xfd922e00 0x1f8>;
> + reg-names = "dsi_ctrl";
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <4>;
> +
> + assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
> + assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
> +
> + clocks = <&mmcc MDSS_MDP_CLK>,
> + <&mmcc MDSS_AHB_CLK>,
> + <&mmcc MDSS_AXI_CLK>,
> + <&mmcc MDSS_BYTE1_CLK>,
> + <&mmcc MDSS_PCLK1_CLK>,
> + <&mmcc MDSS_ESC1_CLK>,
> + <&mmcc MMSS_MISC_AHB_CLK>;
> + clock-names = "mdp_core",
> + "iface",
> + "bus",
> + "byte",
> + "pixel",
> + "core",
> + "core_mmss";
> +
> + phys = <&dsi1_phy>;
> + phy-names = "dsi-phy";
I think this is being removed, isn't it?
> +
> + status = "disabled";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi1_in: endpoint {
> + remote-endpoint = <&mdp5_intf2_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dsi1_out: endpoint {
> + };
> + };
> + };
> + };
> +
> + dsi1_phy: dsi-phy@fd923000 {
And this you change into "phy"?
Best regards,
Krzysztof
