The LPASS pin controller follows generic pin-controller bindings, so
just like TLMM, should have subnodes with '-state' and '-pins'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
---
.../qcom,sc7280-lpass-lpi-pinctrl.yaml | 29 +++++++++++++++++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
index 624e14f00790..a8a48b684692 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
@@ -37,9 +37,17 @@ properties:
gpio-ranges:
maxItems: 1
-#PIN CONFIGURATION NODES
patternProperties:
- '-pins$':
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-sc7280-lpass-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-sc7280-lpass-state"
+ additionalProperties: false
+
+$defs:
+ qcom-sc7280-lpass-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
@@ -116,4 +124,21 @@ examples:
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 15>;
+
+ dmic01-state {
+ dmic01-clk-pins {
+ pins = "gpio6";
+ function = "dmic1_clk";
+ };
+
+ dmic01-clk-sleep-pins {
+ pins = "gpio6";
+ function = "dmic1_clk";
+ };
+ };
+
+ tx-swr-data-sleep-state {
+ pins = "gpio1", "gpio2", "gpio14";
+ function = "swr_tx_data";
+ };
};
--
2.34.1
